coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hda_verb.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/azalia_device.h
>
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const
u32
cim_verb_data
[] = {
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/*
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* VerbTable: CFL Display Audio Codec
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* Revision ID = 0xFF
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* Codec Vendor: 0x8086280B
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*/
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0x8086280B,
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0xFFFFFFFF,
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0x00000005,
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/*
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* Display Audio Verb Table
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* For GEN9, the Vendor Node ID is 08h
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* Port to be exposed to the inbox driver in the vanilla mode
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* PORT C - BIT[7:6] = 01b
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*/
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0x00878140,
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0x00878140,
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0x00878140,
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0x00878140,
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/* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */
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0x00571C10,
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0x00571D00,
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0x00571E56,
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0x00571F18,
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/* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */
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0x00671C20,
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0x00671D00,
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0x00671E56,
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0x00671F18,
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/* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */
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0x00771C30,
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0x00771D00,
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0x00771E56,
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0x00771F18,
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/* Disable the third converter and third Pin (NID 08h) */
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0x00878140,
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0x00878140,
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0x00878140,
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0x00878140,
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/* ALC700 */
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0x10EC0700,
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0xFFFFFFFF,
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0x00000015,
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/*
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* HDA Codec Subsystem ID Verb-table
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* HDA Codec Subsystem ID : 0x10EC112C
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*/
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0x0017202C,
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0x00172111,
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0x001722EC,
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0x00172310,
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/*
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* Pin Widget Verb-table
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* Widget node 0x01
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*/
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0x0017FF00,
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0x0017FF00,
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0x0017FF00,
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0x0017FF00,
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/* Pin widget 0x12 - DMIC */
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0x01271C00,
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0x01271D00,
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0x01271E00,
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0x01271F40,
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/* Pin widget 0x13 - DMIC */
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0x01371CF0,
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0x01371D11,
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0x01371E11,
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0x01371F41,
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/* Pin widget 0x14 - FRONT (Port-D) */
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0x01471CF0,
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0x01471D11,
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0x01471E11,
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0x01471F41,
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/* Pin widget 0x15 - I2S-OUT */
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0x01571C10,
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0x01571D01,
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0x01571E17,
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0x01571F90,
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/* Pin widget 0x16 - LINE3 (Port-B) */
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0x01671C20,
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0x01671D10,
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0x01671E01,
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0x01671F01,
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/* Pin widget 0x17 - I2S-OUT */
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0x01771CF0,
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0x01771D11,
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0x01771E11,
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0x01771F41,
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/* Pin widget 0x18 - I2S-IN */
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0x01871CF0,
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0x01871D11,
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0x01871E11,
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0x01871F41,
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/* Pin widget 0x19 - MIC2 (Port-F) */
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0x01971C30,
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0x01971D90,
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0x01971EA1,
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0x01971F02,
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/* Pin widget 0x1A - LINE1 (Port-C) */
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0x01A71CF0,
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0x01A71D11,
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0x01A71E11,
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0x01A71F41,
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/* Pin widget 0x1B - LINE2 (Port-E) */
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0x01B71C40,
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0x01B71D90,
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0x01B71EA1,
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0x01B71F01,
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/* Pin widget 0x1D - PC-BEEP */
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0x01D71C69,
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0x01D71D84,
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0x01D71E45,
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0x01D71F40,
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/* Pin widget 0x1E - S/PDIF-OUT */
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0x01E71CF0,
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0x01E71D11,
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0x01E71E11,
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0x01E71F41,
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/* Pin widget 0x1F - S/PDIF-IN */
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0x01F71CF0,
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0x01F71D11,
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0x01F71E11,
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0x01F71F41,
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/* Pin widget 0x21 - P-OUT (Port-I) */
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0x02171C2F,
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0x02171D10,
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0x02171E21,
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0x02171F02,
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/* Pin widget 0x29 - I2S-IN */
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0x02971CF0,
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0x02971D11,
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0x02971E11,
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0x02971F41,
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/*
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* Widget node 0x20 : MIC2-Vrefo-R and MIC2-vrefo-L
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* to independent control
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*/
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0x02050045,
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0x02045089,
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0x0205004A,
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0x0204201B,
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/* Widget node 0x20 - 1 */
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0x05850000,
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0x05843888,
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0x0205006F,
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0x02042C0B,
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/*
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* Widget node 0x20 - 2 : Line2-JD gating MIC2-Vrefo-R,
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* P-JD gating MIC2-vrefo-L
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*/
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0x0205006B,
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0x02044260,
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0x05B50010,
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0x05B45C1D,
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/* Widget node 0X20 for ALC1305 */
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0x02050024,
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0x02040010,
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0x02050026,
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0x02040000,
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0x02050028,
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0x02040000,
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0x02050029,
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0x0204B024,
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};
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const
u32
pc_beep_verbs
[] = {
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};
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AZALIA_ARRAY_SIZES
;
azalia_device.h
cim_verb_data
const u32 cim_verb_data[]
Definition:
hda_verb.c:5
pc_beep_verbs
const u32 pc_beep_verbs[]
Definition:
hda_verb.c:37
AZALIA_ARRAY_SIZES
AZALIA_ARRAY_SIZES
Definition:
hda_verb.c:39
u32
uint32_t u32
Definition:
stdint.h:51
src
mainboard
intel
coffeelake_rvp
variants
cfl_h
hda_verb.c
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