coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
w83667hg-a.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef SUPERIO_WINBOND_W83667HG_A
4 #define SUPERIO_WINBOND_W83667HG_A
5 
6 /* Pinmux configuration defines */
7 #define W83667HG_SPI_PINMUX_OFFSET 0x2a
8 
9 #define W83667HG_SPI_PINMUX_GPIO4_SERIAL_B_MASK (1 << 2)
10 #define W83667HG_SPI_PINMUX_GPIO4 (0 << 2)
11 #define W83667HG_SPI_PINMUX_SERIAL_B (1 << 2)
12 
13 /* Logical Device Numbers (LDN). */
14 #define W83667HG_A_FDC 0x00
15 #define W83667HG_A_PP 0x01
16 #define W83667HG_A_SP1 0x02 /* Com1 */
17 #define W83667HG_A_SP2 0x03 /* Com2 */
18 #define W83667HG_A_KBC 0x05
19 #define W83667HG_A_SPI 0x06
20 #define W83667HG_A_GPIO6789_V 0x07
21 #define W83667HG_A_WDT1 0x08
22 #define W83667HG_A_GPIO2345_V 0x09
23 #define W83667HG_A_ACPI 0x0A
24 #define W83667HG_A_HWM_TSI 0x0B /* HW monitor/SB-TSI/deep S5 */
25 #define W83667HG_A_PECI 0x0C
26 #define W83667HG_A_VID_BUSSEL 0x0D /* VID and BUSSEL */
27 #define W83667HG_A_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
28 
29 /* Virtual LDN for GPIO and SPI */
30 #define W83667HG_A_SPI1 ((1 << 8) | W83667HG_A_SPI)
31 #define W83667HG_A_GPIO1 ((1 << 8) | W83667HG_A_WDT1)
32 #define W83667HG_A_GPIO2 ((0 << 8) | W83667HG_A_GPIO2345_V)
33 #define W83667HG_A_GPIO3 ((1 << 8) | W83667HG_A_GPIO2345_V)
34 #define W83667HG_A_GPIO4 ((2 << 8) | W83667HG_A_GPIO2345_V)
35 #define W83667HG_A_GPIO5 ((3 << 8) | W83667HG_A_GPIO2345_V)
36 #define W83667HG_A_GPIO6 ((1 << 8) | W83667HG_A_GPIO6789_V)
37 #define W83667HG_A_GPIO7 ((2 << 8) | W83667HG_A_GPIO6789_V)
38 #define W83667HG_A_GPIO8 ((3 << 8) | W83667HG_A_GPIO6789_V)
39 #define W83667HG_A_GPIO9 ((4 << 8) | W83667HG_A_GPIO6789_V)
40 
41 #endif /* SUPERIO_WINBOND_W83667HG_A */