coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nct5104d.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef SUPERIO_NUVOTON_NCT5104D_H
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#define SUPERIO_NUVOTON_NCT5104D_H
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#include <
device/pnp_type.h
>
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/* SIO global configuration */
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#define IRQ_TYPE_SEL_CR10 0x10
/* UARTA,UARTB */
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#define IRQ_TYPE_SEL_CR11 0x11
/* SMI,UARTC,UARTD,WDTO */
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#define GLOBAL_OPTION_CR26 0x26
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#define CR26_LOCK_REG (1 << 4)
/* required to access CR10/CR11 */
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/* LDN 0x07 specific registers */
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#define NCT5104D_GPIO0_IO 0xE0
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#define NCT5104D_GPIO1_IO 0xE4
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#define NCT5104D_GPIO6_IO 0xF8
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/* LDN 0x0F specific registers */
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#define NCT5104D_GPIO0_PP_OD 0xE0
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#define NCT5104D_GPIO1_PP_OD 0xE1
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#define NCT5104D_GPIO6_PP_OD 0xE6
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/* Logical Device Numbers (LDN). */
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#define NCT5104D_FDC 0x00
/* FDC - not pinned out */
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#define NCT5104D_SP1 0x02
/* UARTA */
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#define NCT5104D_SP2 0x03
/* UARTB */
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#define NCT5104D_GPIO_PP_OD 0x0F
/* GPIO Push-Pull / Open drain select */
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#define NCT5104D_SP3 0x10
/* UARTC */
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#define NCT5104D_SP4 0x11
/* UARTD */
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#define NCT5104D_PORT80 0x14
/* PORT 80 */
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/* Virtual Logical Device Numbers (LDN) */
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#define NCT5104D_GPIO_V 0x07
/* GPIO - 0,1,6 Interface */
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#define NCT5104D_GPIO_WDT_V 0x08
/* GPIO/WDT Interface */
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/* Virtual devices sharing the enables are encoded as follows:
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VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
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*/
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#define NCT5104D_GPIO0 ((0 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO_WDT ((0 << 8) | NCT5104D_GPIO_WDT_V)
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#define NCT5104D_GPIO_IO ((1 << 8) | NCT5104D_GPIO_WDT_V)
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void
nct5104d_enable_uartd
(
pnp_devfn_t
dev);
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#endif
/* SUPERIO_NUVOTON_NCT5104D_H */
nct5104d_enable_uartd
void nct5104d_enable_uartd(pnp_devfn_t dev)
Definition:
early_init.c:28
pnp_type.h
pnp_devfn_t
u32 pnp_devfn_t
Definition:
pnp_type.h:8
src
superio
nuvoton
nct5104d
nct5104d.h
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