33 #define MASTER_PIC_ICW1 0x20
34 #define SLAVE_PIC_ICW1 0xa0
35 #define ICW_SELECT (1 << 4)
36 #define OCW_SELECT (0 << 4)
41 #define MASTER_PIC_ICW2 0x21
42 #define SLAVE_PIC_ICW2 0xa1
43 #define INT_VECTOR_MASTER 0x20
46 #define INT_VECTOR_SLAVE 0x28
50 #define MASTER_PIC_ICW3 0x21
51 #define CASCADED_PIC (1 << 2)
53 #define MASTER_PIC_ICW4 0x21
54 #define SLAVE_PIC_ICW4 0xa1
55 #define MICROPROCESSOR_MODE (1 << 0)
57 #define SLAVE_PIC_ICW3 0xa1
60 #define MASTER_PIC_OCW1 0x21
61 #define SLAVE_PIC_OCW1 0xa1
68 #define IRQ_LEVEL_TRIGGERED 1
69 #define IRQ_EDGE_TRIGGERED 0
u16 pic_read_irq_mask(void)
void pic_write_irq_mask(u16 mask)
void pic_irq_enable(u8 int_num, u8 mask)
void i8259_configure_irq_trigger(int int_num, int is_level_triggered)
Configure IRQ triggering in the i8259 compatible Interrupt Controller.