coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio_soc_defs.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _SOC_ICELAKE_GPIO_SOC_DEFS_H_
4 #define _SOC_ICELAKE_GPIO_SOC_DEFS_H_
5 
6 /*
7  * Most of the fixed numbers and macros are based on the GPP groups.
8  * The GPIO groups are accessed through register blocks called
9  * communities.
10  */
11 #define GPP_G 0x0
12 #define GPP_B 0x1
13 #define GPP_A 0x2
14 #define GPP_R 0x3
15 #define GPP_S 0x4
16 #define GPD 0x5
17 #define GPP_H 0x6
18 #define GPP_D 0x7
19 #define GPP_F 0x8
20 #define GPP_VGPIO 0x9
21 #define GPP_C 0xA
22 #define GPP_E 0xB
23 
24 #define GPIO_MAX_NUM_PER_GROUP 24
25 
26 /*
27  * GPIOs are ordered monotonically increasing to match ACPI/OS driver.
28  */
29 
30 /* Group G */
31 #define GPP_G0 0
32 #define GPP_G1 1
33 #define GPP_G2 2
34 #define GPP_G3 3
35 #define GPP_G4 4
36 #define GPP_G5 5
37 #define GPP_G6 6
38 #define GPP_G7 7
39 
40 /* Group B */
41 #define GPP_B0 8
42 #define GPP_B1 9
43 #define GPP_B2 10
44 #define GPP_B3 11
45 #define GPP_B4 12
46 #define GPP_B5 13
47 #define GPP_B6 14
48 #define GPP_B7 15
49 #define GPP_B8 16
50 #define GPP_B9 17
51 #define GPP_B10 18
52 #define GPP_B11 19
53 #define GPP_B12 20
54 #define GPP_B13 21
55 #define GPP_B14 22
56 #define GPP_B15 23
57 #define GPP_B16 24
58 #define GPP_B17 25
59 #define GPP_B18 26
60 #define GPP_B19 27
61 #define GPP_B20 28
62 #define GPP_B21 29
63 #define GPP_B22 30
64 #define GPP_B23 31
65 #define GPIO_RSVD_0 32
66 #define GPIO_RSVD_1 33
67 
68 /* Group A */
69 #define GPP_A0 34
70 #define GPP_A1 35
71 #define GPP_A2 36
72 #define GPP_A3 37
73 #define GPP_A4 38
74 #define GPP_A5 39
75 #define GPP_A6 40
76 #define GPP_A7 41
77 #define GPP_A8 42
78 #define GPP_A9 43
79 #define GPP_A10 44
80 #define GPP_A11 45
81 #define GPP_A12 46
82 #define GPP_A13 47
83 #define GPP_A14 48
84 #define GPP_A15 49
85 #define GPP_A16 50
86 #define GPP_A17 51
87 #define GPP_A18 52
88 #define GPP_A19 53
89 #define GPP_A20 54
90 #define GPP_A21 55
91 #define GPP_A22 56
92 #define GPP_A23 57
93 
94 #define NUM_GPIO_COM0_PADS (GPP_A23 - GPP_G0 + 1)
95 
96 /* Group H */
97 #define GPP_H0 58
98 #define GPP_H1 59
99 #define GPP_H2 60
100 #define GPP_H3 61
101 #define GPP_H4 62
102 #define GPP_H5 63
103 #define GPP_H6 64
104 #define GPP_H7 65
105 #define GPP_H8 66
106 #define GPP_H9 67
107 #define GPP_H10 68
108 #define GPP_H11 69
109 #define GPP_H12 70
110 #define GPP_H13 71
111 #define GPP_H14 72
112 #define GPP_H15 73
113 #define GPP_H16 74
114 #define GPP_H17 75
115 #define GPP_H18 76
116 #define GPP_H19 77
117 #define GPP_H20 78
118 #define GPP_H21 79
119 #define GPP_H22 80
120 #define GPP_H23 81
121 
122 /* Group D */
123 #define GPP_D0 82
124 #define GPP_D1 83
125 #define GPP_D2 84
126 #define GPP_D3 85
127 #define GPP_D4 86
128 #define GPP_D5 87
129 #define GPP_D6 88
130 #define GPP_D7 89
131 #define GPP_D8 90
132 #define GPP_D9 91
133 #define GPP_D10 92
134 #define GPP_D11 93
135 #define GPP_D12 94
136 #define GPP_D13 95
137 #define GPP_D14 96
138 #define GPP_D15 97
139 #define GPP_D16 98
140 #define GPP_D17 99
141 #define GPP_D18 100
142 #define GPP_D19 101
143 #define GPIO_RSVD_2 102
144 
145 /* Group F */
146 #define GPP_F0 103
147 #define GPP_F1 104
148 #define GPP_F2 105
149 #define GPP_F3 106
150 #define GPP_F4 107
151 #define GPP_F5 108
152 #define GPP_F6 109
153 #define GPP_F7 110
154 #define GPP_F8 111
155 #define GPP_F9 112
156 #define GPP_F10 113
157 #define GPP_F11 114
158 #define GPP_F12 115
159 #define GPP_F13 116
160 #define GPP_F14 117
161 #define GPP_F15 118
162 #define GPP_F16 119
163 #define GPP_F17 120
164 #define GPP_F18 121
165 #define GPP_F19 122
166 
167 #define NUM_GPIO_COM1_PADS (GPP_F19 - GPP_H0 + 1)
168 
169 /* Group GPD */
170 #define GPD0 123
171 #define GPD1 124
172 #define GPD2 125
173 #define GPD3 126
174 #define GPD4 127
175 #define GPD5 128
176 #define GPD6 129
177 #define GPD7 130
178 #define GPD8 131
179 #define GPD9 132
180 #define GPD10 133
181 #define GPD11 134
182 
183 #define NUM_GPIO_COM2_PADS (GPD11 - GPD0 + 1)
184 
185 /* Group C */
186 #define GPP_C0 135
187 #define GPP_C1 136
188 #define GPP_C2 137
189 #define GPP_C3 138
190 #define GPP_C4 139
191 #define GPP_C5 140
192 #define GPP_C6 141
193 #define GPP_C7 142
194 #define GPP_C8 143
195 #define GPP_C9 144
196 #define GPP_C10 145
197 #define GPP_C11 146
198 #define GPP_C12 147
199 #define GPP_C13 148
200 #define GPP_C14 149
201 #define GPP_C15 150
202 #define GPP_C16 151
203 #define GPP_C17 152
204 #define GPP_C18 153
205 #define GPP_C19 154
206 #define GPP_C20 155
207 #define GPP_C21 156
208 #define GPP_C22 157
209 #define GPP_C23 158
210 #define GPIO_RSVD_3 159
211 #define GPIO_RSVD_4 160
212 #define GPIO_RSVD_5 161
213 #define GPIO_RSVD_6 162
214 #define GPIO_RSVD_7 163
215 #define GPIO_RSVD_8 164
216 
217 /* Group HVCMOS */
218 #define EDP_BKLTEN 165
219 #define EDP_BKLTCTL 166
220 #define EDP_VDDEN 167
221 #define SYS_PWROK 168
222 #define SYS_RESET_B 169
223 #define MLK_RST_B 170
224 
225 /* Group E */
226 #define GPP_E0 171
227 #define GPP_E1 172
228 #define GPP_E2 173
229 #define GPP_E3 174
230 #define GPP_E4 175
231 #define GPP_E5 176
232 #define GPP_E6 177
233 #define GPP_E7 178
234 #define GPP_E8 179
235 #define GPP_E9 180
236 #define GPP_E10 181
237 #define GPP_E11 182
238 #define GPP_E12 183
239 #define GPP_E13 184
240 #define GPP_E14 185
241 #define GPP_E15 186
242 #define GPP_E16 187
243 #define GPP_E17 188
244 #define GPP_E18 189
245 #define GPP_E19 190
246 #define GPP_E20 191
247 #define GPP_E21 192
248 #define GPP_E22 193
249 #define GPP_E23 194
250 
251 #define NUM_GPIO_COM4_PADS (GPP_E23 - GPP_C0 + 1)
252 
253 /* Group R*/
254 #define GPP_R0 195
255 #define GPP_R1 196
256 #define GPP_R2 197
257 #define GPP_R3 198
258 #define GPP_R4 199
259 #define GPP_R5 200
260 #define GPP_R6 201
261 #define GPP_R7 202
262 
263 /* Group S */
264 #define GPP_S0 203
265 #define GPP_S1 204
266 #define GPP_S2 205
267 #define GPP_S3 206
268 #define GPP_S4 207
269 #define GPP_S5 208
270 #define GPP_S6 209
271 #define GPP_S7 210
272 
273 #define NUM_GPIO_COM5_PADS (GPP_S7 - GPP_R0 + 1)
274 
275 #define TOTAL_PADS 211
276 
277 #define COMM_0 0
278 #define COMM_1 1
279 #define COMM_2 2
280 #define COMM_3 3
281 #define COMM_4 4
282 #define TOTAL_GPIO_COMM 5
283 
284 #endif