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gpio_soc_defs.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _SOC_ICELAKE_GPIO_SOC_DEFS_H_
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#define _SOC_ICELAKE_GPIO_SOC_DEFS_H_
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/*
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* Most of the fixed numbers and macros are based on the GPP groups.
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* The GPIO groups are accessed through register blocks called
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* communities.
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*/
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#define GPP_G 0x0
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#define GPP_B 0x1
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#define GPP_A 0x2
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#define GPP_R 0x3
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#define GPP_S 0x4
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#define GPD 0x5
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#define GPP_H 0x6
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#define GPP_D 0x7
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#define GPP_F 0x8
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#define GPP_VGPIO 0x9
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#define GPP_C 0xA
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#define GPP_E 0xB
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#define GPIO_MAX_NUM_PER_GROUP 24
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/*
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* GPIOs are ordered monotonically increasing to match ACPI/OS driver.
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*/
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/* Group G */
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#define GPP_G0 0
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#define GPP_G1 1
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#define GPP_G2 2
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#define GPP_G3 3
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#define GPP_G4 4
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#define GPP_G5 5
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#define GPP_G6 6
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#define GPP_G7 7
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/* Group B */
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#define GPP_B0 8
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#define GPP_B1 9
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#define GPP_B2 10
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#define GPP_B3 11
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#define GPP_B4 12
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#define GPP_B5 13
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#define GPP_B6 14
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#define GPP_B7 15
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#define GPP_B8 16
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#define GPP_B9 17
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#define GPP_B10 18
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#define GPP_B11 19
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#define GPP_B12 20
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#define GPP_B13 21
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#define GPP_B14 22
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#define GPP_B15 23
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#define GPP_B16 24
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#define GPP_B17 25
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#define GPP_B18 26
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#define GPP_B19 27
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#define GPP_B20 28
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#define GPP_B21 29
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#define GPP_B22 30
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#define GPP_B23 31
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#define GPIO_RSVD_0 32
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#define GPIO_RSVD_1 33
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/* Group A */
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#define GPP_A0 34
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#define GPP_A1 35
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#define GPP_A2 36
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#define GPP_A3 37
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#define GPP_A4 38
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#define GPP_A5 39
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#define GPP_A6 40
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#define GPP_A7 41
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#define GPP_A8 42
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#define GPP_A9 43
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#define GPP_A10 44
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#define GPP_A11 45
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#define GPP_A12 46
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#define GPP_A13 47
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#define GPP_A14 48
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#define GPP_A15 49
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#define GPP_A16 50
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#define GPP_A17 51
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#define GPP_A18 52
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#define GPP_A19 53
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#define GPP_A20 54
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#define GPP_A21 55
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#define GPP_A22 56
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#define GPP_A23 57
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#define NUM_GPIO_COM0_PADS (GPP_A23 - GPP_G0 + 1)
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/* Group H */
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#define GPP_H0 58
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#define GPP_H1 59
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#define GPP_H2 60
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#define GPP_H3 61
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#define GPP_H4 62
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#define GPP_H5 63
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#define GPP_H6 64
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#define GPP_H7 65
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#define GPP_H8 66
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#define GPP_H9 67
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#define GPP_H10 68
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#define GPP_H11 69
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#define GPP_H12 70
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#define GPP_H13 71
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#define GPP_H14 72
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#define GPP_H15 73
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#define GPP_H16 74
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#define GPP_H17 75
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#define GPP_H18 76
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#define GPP_H19 77
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#define GPP_H20 78
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#define GPP_H21 79
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#define GPP_H22 80
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#define GPP_H23 81
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/* Group D */
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#define GPP_D0 82
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#define GPP_D1 83
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#define GPP_D2 84
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#define GPP_D3 85
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#define GPP_D4 86
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#define GPP_D5 87
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#define GPP_D6 88
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#define GPP_D7 89
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#define GPP_D8 90
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#define GPP_D9 91
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#define GPP_D10 92
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#define GPP_D11 93
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#define GPP_D12 94
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#define GPP_D13 95
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#define GPP_D14 96
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#define GPP_D15 97
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#define GPP_D16 98
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#define GPP_D17 99
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#define GPP_D18 100
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#define GPP_D19 101
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#define GPIO_RSVD_2 102
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/* Group F */
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#define GPP_F0 103
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#define GPP_F1 104
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#define GPP_F2 105
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#define GPP_F3 106
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#define GPP_F4 107
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#define GPP_F5 108
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#define GPP_F6 109
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#define GPP_F7 110
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#define GPP_F8 111
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#define GPP_F9 112
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#define GPP_F10 113
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#define GPP_F11 114
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#define GPP_F12 115
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#define GPP_F13 116
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#define GPP_F14 117
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#define GPP_F15 118
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#define GPP_F16 119
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#define GPP_F17 120
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#define GPP_F18 121
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#define GPP_F19 122
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#define NUM_GPIO_COM1_PADS (GPP_F19 - GPP_H0 + 1)
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/* Group GPD */
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#define GPD0 123
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#define GPD1 124
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#define GPD2 125
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#define GPD3 126
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#define GPD4 127
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#define GPD5 128
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#define GPD6 129
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#define GPD7 130
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#define GPD8 131
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#define GPD9 132
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#define GPD10 133
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#define GPD11 134
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#define NUM_GPIO_COM2_PADS (GPD11 - GPD0 + 1)
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/* Group C */
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#define GPP_C0 135
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#define GPP_C1 136
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#define GPP_C2 137
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#define GPP_C3 138
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#define GPP_C4 139
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#define GPP_C5 140
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#define GPP_C6 141
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#define GPP_C7 142
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#define GPP_C8 143
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#define GPP_C9 144
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#define GPP_C10 145
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#define GPP_C11 146
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#define GPP_C12 147
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#define GPP_C13 148
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#define GPP_C14 149
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#define GPP_C15 150
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#define GPP_C16 151
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#define GPP_C17 152
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#define GPP_C18 153
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#define GPP_C19 154
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#define GPP_C20 155
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#define GPP_C21 156
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#define GPP_C22 157
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#define GPP_C23 158
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#define GPIO_RSVD_3 159
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#define GPIO_RSVD_4 160
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#define GPIO_RSVD_5 161
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#define GPIO_RSVD_6 162
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#define GPIO_RSVD_7 163
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#define GPIO_RSVD_8 164
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/* Group HVCMOS */
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#define EDP_BKLTEN 165
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#define EDP_BKLTCTL 166
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#define EDP_VDDEN 167
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#define SYS_PWROK 168
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#define SYS_RESET_B 169
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#define MLK_RST_B 170
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/* Group E */
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#define GPP_E0 171
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#define GPP_E1 172
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#define GPP_E2 173
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#define GPP_E3 174
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#define GPP_E4 175
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#define GPP_E5 176
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#define GPP_E6 177
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#define GPP_E7 178
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#define GPP_E8 179
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#define GPP_E9 180
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#define GPP_E10 181
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#define GPP_E11 182
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#define GPP_E12 183
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#define GPP_E13 184
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#define GPP_E14 185
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#define GPP_E15 186
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#define GPP_E16 187
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#define GPP_E17 188
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#define GPP_E18 189
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#define GPP_E19 190
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#define GPP_E20 191
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#define GPP_E21 192
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#define GPP_E22 193
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#define GPP_E23 194
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#define NUM_GPIO_COM4_PADS (GPP_E23 - GPP_C0 + 1)
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/* Group R*/
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#define GPP_R0 195
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#define GPP_R1 196
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#define GPP_R2 197
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#define GPP_R3 198
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#define GPP_R4 199
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#define GPP_R5 200
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#define GPP_R6 201
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#define GPP_R7 202
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/* Group S */
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#define GPP_S0 203
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#define GPP_S1 204
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#define GPP_S2 205
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#define GPP_S3 206
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#define GPP_S4 207
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#define GPP_S5 208
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#define GPP_S6 209
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#define GPP_S7 210
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#define NUM_GPIO_COM5_PADS (GPP_S7 - GPP_R0 + 1)
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#define TOTAL_PADS 211
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#define COMM_0 0
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#define COMM_1 1
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#define COMM_2 2
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#define COMM_3 3
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#define COMM_4 4
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#define TOTAL_GPIO_COMM 5
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#endif
src
soc
intel
icelake
include
soc
gpio_soc_defs.h
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