coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#ifndef _SOC_CANNONLAKE_GPIO_H_
4
#define _SOC_CANNONLAKE_GPIO_H_
5
6
#if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
7
#include <
soc/gpio_defs_cnp_h.h
>
8
#define CROS_GPIO_DEVICE_NAME "INT3450:00"
9
#else
10
#include <soc/gpio_defs.h>
11
#define CROS_GPIO_DEVICE_NAME "INT34BB:00"
12
#endif
13
#include <
intelblocks/gpio.h
>
14
15
/* Enable GPIO community power management configuration */
16
#define MISCCFG_GPIO_PM_CONFIG_BITS (MISCCFG_GPSIDEDPCGEN | \
17
MISCCFG_GPRCOMPCDLCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN \
18
| MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN)
19
20
#ifndef __ACPI__
21
struct
pad_config
;
22
23
/*
24
* Routine to perform below operations:
25
* 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register
26
* 2. Program GPIO PM configuration based on PM mask and value
27
*/
28
void
soc_gpio_pm_configuration
(
void
);
29
#endif
30
31
#endif
gpio_defs_cnp_h.h
soc_gpio_pm_configuration
void soc_gpio_pm_configuration(void)
Definition:
gpio_common.c:11
gpio.h
pad_config
Definition:
gpio.h:75
src
soc
intel
cannonlake
include
soc
gpio.h
Generated by
1.9.1