coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hda_verb.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/azalia_device.h>
4 
5 const u32 cim_verb_data[] = {
6  /* coreboot specific header */
7  0x10ec0262, // Codec Vendor / Device ID: Realtek ALC262
8  0x10714700, // Subsystem ID
9  0x0000000d, // Number of jacks
10 
11  /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0000 */
12  AZALIA_SUBVENDOR(0, 0x10EC0000),
13 
14  /* Pin Widget Verb Table */
15 
16  /* Pin Complex (NID 0x12), DMIC */
17  AZALIA_PIN_CFG(0, 0x12, 0x411111F0),
18 
19  /* Pin Complex (NID 0x14), LINE_OUT (port D) */
20  AZALIA_PIN_CFG(0, 0x14, 0x99130110),
21 
22  /* Pin Complex (NID 0x15), HP_OUT (port A) */
23  AZALIA_PIN_CFG(0, 0x15, 0x01214020),
24 
25  /* Pin Complex (NID 0x16), MONO-OUT */
26  AZALIA_PIN_CFG(0, 0x16, 0x411111F0),
27 
28  /* Pin Complex (NID 0x18), MIC1 (port B) */
29  AZALIA_PIN_CFG(0, 0x18, 0x01A19830),
30 
31  /* Pin Complex (NID 0x19), MIC2 (port F) */
32  AZALIA_PIN_CFG(0, 0x19, 0x99A30931),
33 
34  /* Pin Complex (NID 0x1A), LINE1 (port C) */
35  AZALIA_PIN_CFG(0, 0x1A, 0x02A1983F),
36 
37  /* Pin Complex (NID 0x1B), LINE2 (port E) */
38  AZALIA_PIN_CFG(0, 0x1B, 0x0221401F),
39 
40  /* Pin Complex (NID 0x1C), CD_IN */
41  AZALIA_PIN_CFG(0, 0x1C, 0x411111F0),
42 
43  /* Pin Complex (NID 0x1D), PCBEEP */
44  AZALIA_PIN_CFG(0, 0x1D, 0x411111F0),
45 
46  /* Pin Complex (NID 0x1E), S/PDIF-OUT */
47  AZALIA_PIN_CFG(0, 0x1E, 0x411111F0),
48 
49  /* Pin Complex (NID 0x1F), S/PDIF-IN */
50  AZALIA_PIN_CFG(0, 0x1F, 0x411111F0),
51 };
52 
53 const u32 pc_beep_verbs[0] = {};
54 
#define AZALIA_SUBVENDOR(codec, val)
#define AZALIA_PIN_CFG(codec, pin, val)
const u32 cim_verb_data[]
Definition: hda_verb.c:5
const u32 pc_beep_verbs[]
Definition: hda_verb.c:37
AZALIA_ARRAY_SIZES
Definition: hda_verb.c:39
uint32_t u32
Definition: stdint.h:51