coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sdram-lpddr3-K4E6E304EB-2GB-1CH.inc
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3  {
4  {
5  {
6  .rank = 0x2,
7  .col = 0xA,
8  .bk = 0x3,
9  .bw = 0x2,
10  .dbw = 0x2,
11  .row_3_4 = 0x0,
12  .cs0_row = 0xF,
13  .cs1_row = 0xF
14  },
15  {
16  .rank = 0x0,
17  .col = 0x0,
18  .bk = 0x0,
19  .bw = 0x0,
20  .dbw = 0x0,
21  .row_3_4 = 0x0,
22  .cs0_row = 0x0,
23  .cs1_row = 0x0
24  }
25  },
26  {
27  .togcnt1u = 0x215,
28  .tinit = 0xC8,
29  .trsth = 0x0,
30  .togcnt100n = 0x35,
31  .trefi = 0x26,
32  .tmrd = 0x2,
33  .trfc = 0x70,
34  .trp = 0x2000D,
35  .trtw = 0x6,
36  .tal = 0x0,
37  .tcl = 0x8,
38  .tcwl = 0x4,
39  .tras = 0x17,
40  .trc = 0x24,
41  .trcd = 0xD,
42  .trrd = 0x6,
43  .trtp = 0x4,
44  .twr = 0x8,
45  .twtr = 0x4,
46  .texsr = 0x76,
47  .txp = 0x4,
48  .txpdll = 0x0,
49  .tzqcs = 0x30,
50  .tzqcsi = 0x0,
51  .tdqs = 0x1,
52  .tcksre = 0x2,
53  .tcksrx = 0x2,
54  .tcke = 0x4,
55  .tmod = 0x0,
56  .trstl = 0x0,
57  .tzqcl = 0xC0,
58  .tmrr = 0x4,
59  .tckesr = 0x8,
60  .tdpd = 0x1F4
61  },
62  {
63  .dtpr0 = 0x48D7DD93,
64  .dtpr1 = 0x187008D8,
65  .dtpr2 = 0x121076,
66  .mr[0] = 0x0,
67  .mr[1] = 0xC3,
68  .mr[2] = 0x6,
69  .mr[3] = 0x1
70  },
71  .noc_timing = 0x20D266A4,
72  .noc_activate = 0x5B6,
73  .ddrconfig = 3,
74  .ddr_freq = 533*MHz,
75  .dramtype = LPDDR3,
76  .num_channels = 1,
77  .stride = 22,
78  .odt = 0
79 },
MHz
#define MHz
Definition: helpers.h:80
LPDDR3
@ LPDDR3
Definition: sdram.h:10