coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
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#define __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
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#include <
assert.h
>
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#include <gpio.h>
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#define GPIO_POWEROFF GPIO(1, A, 6)
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#define GPIO_RESET GPIO(0, B, 3)
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#define GPIO_SDMMC_PWR GPIO(4, D, 5)
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#if CONFIG(GRU_BASEBOARD_SCARLET)
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#define GPIO_BL_EN GPIO(4, C, 5)
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#define GPIO_BACKLIGHT GPIO(4, C, 6)
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#define GPIO_EC_IN_RW GPIO(0, A, 1)
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#define GPIO_EC_IRQ GPIO(1, C, 2)
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#define GPIO_P15V_EN dead_code_t(gpio_t)
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#define GPIO_P18V_AUDIO_PWREN dead_code_t(gpio_t)
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#define GPIO_P30V_EN GPIO(0, B, 1)
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#define GPIO_SPK_PA_EN GPIO(0, A, 2)
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#define GPIO_TP_RST_L dead_code_t(gpio_t)
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#define GPIO_TPM_IRQ GPIO(1, C, 1)
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#define GPIO_WP GPIO(0, B, 5)
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#else
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#define GPIO_BL_EN GPIO(1, C, 1)
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#define GPIO_BACKLIGHT dead_code_t(gpio_t)
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#define GPIO_EC_IN_RW GPIO(3, B, 0)
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#define GPIO_EC_IRQ GPIO(0, A, 1)
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#define GPIO_P15V_EN GPIO(0, B, 2)
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#define GPIO_P18V_AUDIO_PWREN GPIO(0, A, 2)
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#define GPIO_P30V_EN GPIO(0, B, 4)
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#define GPIO_SPK_PA_EN GPIO(1, A, 2)
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#define GPIO_TP_RST_L GPIO(3, B, 4)
/* may also be an I2C pull-up enable */
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#define GPIO_TPM_IRQ GPIO(0, A, 5)
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#define GPIO_WP GPIO(1, C, 2)
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#endif
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#if CONFIG(GRU_HAS_WLAN_RESET)
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#define GPIO_WLAN_RST_L GPIO(1, B, 3)
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#else
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#define GPIO_WLAN_RST_L dead_code_t(gpio_t)
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#endif
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void
setup_chromeos_gpios
(
void
);
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#endif
/* ! __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H */
assert.h
setup_chromeos_gpios
void setup_chromeos_gpios(void)
Definition:
chromeos.c:10
src
mainboard
google
gru
board.h
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