coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
4 #define __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
5 
6 #include <assert.h>
7 #include <gpio.h>
8 
9 #define GPIO_POWEROFF GPIO(1, A, 6)
10 #define GPIO_RESET GPIO(0, B, 3)
11 #define GPIO_SDMMC_PWR GPIO(4, D, 5)
12 
13 #if CONFIG(GRU_BASEBOARD_SCARLET)
14 #define GPIO_BL_EN GPIO(4, C, 5)
15 #define GPIO_BACKLIGHT GPIO(4, C, 6)
16 #define GPIO_EC_IN_RW GPIO(0, A, 1)
17 #define GPIO_EC_IRQ GPIO(1, C, 2)
18 #define GPIO_P15V_EN dead_code_t(gpio_t)
19 #define GPIO_P18V_AUDIO_PWREN dead_code_t(gpio_t)
20 #define GPIO_P30V_EN GPIO(0, B, 1)
21 #define GPIO_SPK_PA_EN GPIO(0, A, 2)
22 #define GPIO_TP_RST_L dead_code_t(gpio_t)
23 #define GPIO_TPM_IRQ GPIO(1, C, 1)
24 #define GPIO_WP GPIO(0, B, 5)
25 #else
26 #define GPIO_BL_EN GPIO(1, C, 1)
27 #define GPIO_BACKLIGHT dead_code_t(gpio_t)
28 #define GPIO_EC_IN_RW GPIO(3, B, 0)
29 #define GPIO_EC_IRQ GPIO(0, A, 1)
30 #define GPIO_P15V_EN GPIO(0, B, 2)
31 #define GPIO_P18V_AUDIO_PWREN GPIO(0, A, 2)
32 #define GPIO_P30V_EN GPIO(0, B, 4)
33 #define GPIO_SPK_PA_EN GPIO(1, A, 2)
34 #define GPIO_TP_RST_L GPIO(3, B, 4) /* may also be an I2C pull-up enable */
35 #define GPIO_TPM_IRQ GPIO(0, A, 5)
36 #define GPIO_WP GPIO(1, C, 2)
37 #endif
38 
39 #if CONFIG(GRU_HAS_WLAN_RESET)
40 #define GPIO_WLAN_RST_L GPIO(1, B, 3)
41 #else
42 #define GPIO_WLAN_RST_L dead_code_t(gpio_t)
43 #endif
44 
45 void setup_chromeos_gpios(void);
46 
47 #endif /* ! __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H */
void setup_chromeos_gpios(void)
Definition: chromeos.c:10