coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_
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#define _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_
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#include <
assert.h
>
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#include <gpio.h>
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#if CONFIG(BOARD_GOOGLE_HEROBRINE_REV0)
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#define GPIO_EC_IN_RW GPIO(68)
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#define GPIO_AP_EC_INT GPIO(142)
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#define GPIO_H1_AP_INT GPIO(54)
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#elif CONFIG(BOARD_GOOGLE_SENOR)
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#define GPIO_EC_IN_RW dead_code_t(gpio_t)
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#define GPIO_AP_EC_INT dead_code_t(gpio_t)
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#define GPIO_H1_AP_INT dead_code_t(gpio_t)
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#else
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#define GPIO_EC_IN_RW GPIO(156)
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#define GPIO_AP_EC_INT GPIO(18)
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#define GPIO_H1_AP_INT GPIO(104)
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#endif
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#define GPIO_SD_CD_L GPIO(91)
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#if CONFIG(BOARD_GOOGLE_HEROBRINE_REV0)
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#define USB_HUB_LDO_EN GPIO(24)
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#else
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/* For Herobrine board and all variants */
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#define USB_HUB_LDO_EN GPIO(157)
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#endif
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#define GPIO_AMP_ENABLE GPIO(63)
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#define GPIO_MI2S1_SCK GPIO(106)
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#define GPIO_MI2S1_DATA0 GPIO(107)
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#define GPIO_MI2S1_WS GPIO(108)
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#define QCOM_SC7280_SKU1 0x0
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#define QCOM_SC7280_SKU2 0x1
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/* Fingerprint-specific GPIOs. Only for fingerprint-enabled devices. */
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#if CONFIG(HEROBRINE_HAS_FINGERPRINT)
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#define GPIO_FPMCU_BOOT0 (CONFIG(BOARD_GOOGLE_HEROBRINE_REV0) ? GPIO(77) : GPIO(68))
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#define GPIO_FP_RST_L GPIO(78)
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#define GPIO_EN_FP_RAILS (CONFIG(BOARD_GOOGLE_HEROBRINE_REV0) ? GPIO(42) : GPIO(77))
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#else
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#define GPIO_FPMCU_BOOT0 dead_code_t(gpio_t)
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#define GPIO_FP_RST_L dead_code_t(gpio_t)
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#define GPIO_EN_FP_RAILS dead_code_t(gpio_t)
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#endif
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void
setup_chromeos_gpios
(
void
);
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#endif
/* _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_ */
assert.h
setup_chromeos_gpios
void setup_chromeos_gpios(void)
Definition:
chromeos.c:10
src
mainboard
google
herobrine
board.h
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