coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
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#define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
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#include <
assert.h
>
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#include <
boardid.h
>
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#include <gpio.h>
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#include <soc/gpio.h>
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#define GPIO_EC_IN_RW GPIO(118)
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#define GPIO_AP_EC_INT GPIO(94)
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#define GPIO_H1_AP_INT (CONFIG(TROGDOR_REV0) ? GPIO(21) : GPIO(42))
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#define GPIO_SD_CD_L GPIO(69)
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#define GPIO_AMP_ENABLE GPIO(23)
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/* Display specific GPIOS */
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#define GPIO_BACKLIGHT_ENABLE GPIO(12)
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/* MIPI panel specific GPIOs. Only for mipi_panel-enabled devices (e.g. Mrbland). */
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#if CONFIG(TROGDOR_HAS_MIPI_PANEL)
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#define GPIO_MIPI_1V8_ENABLE GPIO(86)
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#define GPIO_AVDD_LCD_ENABLE GPIO(88)
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#define GPIO_AVEE_LCD_ENABLE GPIO(21)
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#define GPIO_VDD_RESET_1V8 GPIO(87)
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#define GPIO_TP_EN (CONFIG(BOARD_GOOGLE_QUACKINGSTICK) ? GPIO(67) : GPIO(85))
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#define GPIO_EDP_BRIDGE_ENABLE dead_code_t(gpio_t)
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#define GPIO_EN_PP3300_DX_EDP dead_code_t(gpio_t)
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#define GPIO_PS8640_EDP_BRIDGE_PD_L dead_code_t(gpio_t)
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#define GPIO_PS8640_EDP_BRIDGE_RST_L dead_code_t(gpio_t)
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#define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE dead_code_t(gpio_t)
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#else
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#define GPIO_MIPI_1V8_ENABLE dead_code_t(gpio_t)
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#define GPIO_AVDD_LCD_ENABLE dead_code_t(gpio_t)
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#define GPIO_AVEE_LCD_ENABLE dead_code_t(gpio_t)
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#define GPIO_VDD_RESET_1V8 dead_code_t(gpio_t)
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#define GPIO_TP_EN dead_code_t(gpio_t)
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#define GPIO_EDP_BRIDGE_ENABLE (CONFIG(TROGDOR_REV0) ? GPIO(14) : GPIO(104))
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#define GPIO_EN_PP3300_DX_EDP (CONFIG(TROGDOR_REV0) ? GPIO(106) : \
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(CONFIG(BOARD_GOOGLE_TROGDOR) && board_id() == 1 ? GPIO(30) : \
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(CONFIG(BOARD_GOOGLE_COACHZ) && board_id() == 0 ? GPIO(52) : \
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(CONFIG(BOARD_GOOGLE_LAZOR) || CONFIG(BOARD_GOOGLE_POMPOM) ? GPIO(30) : \
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GPIO(67)))))
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/*PS8640 specific GPIOs */
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#define GPIO_PS8640_EDP_BRIDGE_PD_L GPIO_EDP_BRIDGE_ENABLE
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#define GPIO_PS8640_EDP_BRIDGE_RST_L GPIO(11)
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#define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE GPIO(32)
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#endif
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/* Fingerprint-specific GPIOs. Only for fingerprint-enabled devices (e.g. CoachZ). */
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#if CONFIG(TROGDOR_HAS_FINGERPRINT)
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#define GPIO_FPMCU_BOOT0 GPIO(10)
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#define GPIO_FP_RST_L GPIO(22)
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#define GPIO_EN_FP_RAILS GPIO(74)
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#else
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#define GPIO_FPMCU_BOOT0 dead_code_t(gpio_t)
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#define GPIO_FP_RST_L dead_code_t(gpio_t)
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#define GPIO_EN_FP_RAILS dead_code_t(gpio_t)
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#endif
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void
setup_chromeos_gpios
(
void
);
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#endif
/* _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ */
assert.h
boardid.h
setup_chromeos_gpios
void setup_chromeos_gpios(void)
Definition:
chromeos.c:10
src
mainboard
google
trogdor
board.h
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