coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
4 #define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
5 
6 #include <assert.h>
7 #include <boardid.h>
8 #include <gpio.h>
9 #include <soc/gpio.h>
10 
11 #define GPIO_EC_IN_RW GPIO(118)
12 #define GPIO_AP_EC_INT GPIO(94)
13 #define GPIO_H1_AP_INT (CONFIG(TROGDOR_REV0) ? GPIO(21) : GPIO(42))
14 #define GPIO_SD_CD_L GPIO(69)
15 #define GPIO_AMP_ENABLE GPIO(23)
16 
17 /* Display specific GPIOS */
18 #define GPIO_BACKLIGHT_ENABLE GPIO(12)
19 
20 /* MIPI panel specific GPIOs. Only for mipi_panel-enabled devices (e.g. Mrbland). */
21 #if CONFIG(TROGDOR_HAS_MIPI_PANEL)
22 #define GPIO_MIPI_1V8_ENABLE GPIO(86)
23 #define GPIO_AVDD_LCD_ENABLE GPIO(88)
24 #define GPIO_AVEE_LCD_ENABLE GPIO(21)
25 #define GPIO_VDD_RESET_1V8 GPIO(87)
26 #define GPIO_TP_EN (CONFIG(BOARD_GOOGLE_QUACKINGSTICK) ? GPIO(67) : GPIO(85))
27 #define GPIO_EDP_BRIDGE_ENABLE dead_code_t(gpio_t)
28 #define GPIO_EN_PP3300_DX_EDP dead_code_t(gpio_t)
29 #define GPIO_PS8640_EDP_BRIDGE_PD_L dead_code_t(gpio_t)
30 #define GPIO_PS8640_EDP_BRIDGE_RST_L dead_code_t(gpio_t)
31 #define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE dead_code_t(gpio_t)
32 #else
33 #define GPIO_MIPI_1V8_ENABLE dead_code_t(gpio_t)
34 #define GPIO_AVDD_LCD_ENABLE dead_code_t(gpio_t)
35 #define GPIO_AVEE_LCD_ENABLE dead_code_t(gpio_t)
36 #define GPIO_VDD_RESET_1V8 dead_code_t(gpio_t)
37 #define GPIO_TP_EN dead_code_t(gpio_t)
38 #define GPIO_EDP_BRIDGE_ENABLE (CONFIG(TROGDOR_REV0) ? GPIO(14) : GPIO(104))
39 #define GPIO_EN_PP3300_DX_EDP (CONFIG(TROGDOR_REV0) ? GPIO(106) : \
40  (CONFIG(BOARD_GOOGLE_TROGDOR) && board_id() == 1 ? GPIO(30) : \
41  (CONFIG(BOARD_GOOGLE_COACHZ) && board_id() == 0 ? GPIO(52) : \
42  (CONFIG(BOARD_GOOGLE_LAZOR) || CONFIG(BOARD_GOOGLE_POMPOM) ? GPIO(30) : \
43  GPIO(67)))))
44 /*PS8640 specific GPIOs */
45 #define GPIO_PS8640_EDP_BRIDGE_PD_L GPIO_EDP_BRIDGE_ENABLE
46 #define GPIO_PS8640_EDP_BRIDGE_RST_L GPIO(11)
47 #define GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE GPIO(32)
48 #endif
49 
50 /* Fingerprint-specific GPIOs. Only for fingerprint-enabled devices (e.g. CoachZ). */
51 #if CONFIG(TROGDOR_HAS_FINGERPRINT)
52 #define GPIO_FPMCU_BOOT0 GPIO(10)
53 #define GPIO_FP_RST_L GPIO(22)
54 #define GPIO_EN_FP_RAILS GPIO(74)
55 #else
56 #define GPIO_FPMCU_BOOT0 dead_code_t(gpio_t)
57 #define GPIO_FP_RST_L dead_code_t(gpio_t)
58 #define GPIO_EN_FP_RAILS dead_code_t(gpio_t)
59 #endif
60 
61 void setup_chromeos_gpios(void);
62 
63 #endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ */
void setup_chromeos_gpios(void)
Definition: chromeos.c:10