coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio_defs.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _SOC_ELKHARTLAKE_GPIO_DEFS_H_
4 #define _SOC_ELKHARTLAKE_GPIO_DEFS_H_
5 
6 #ifndef __ACPI__
7 #include <stddef.h>
8 #endif
9 #include <soc/gpio_soc_defs.h>
10 
11 
12 #define GPIO_NUM_PAD_CFG_REGS 4 /* DW0, DW1, DW2, DW3 */
13 
14 #define NUM_GPIO_COMx_GPI_REGS(n) \
15  (ALIGN_UP((n), GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP)
16 
17 #define NUM_GPIO_COM0_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM0_PADS)
18 #define NUM_GPIO_COM1_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM1_PADS)
19 #define NUM_GPIO_COM2_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM2_PADS)
20 #define NUM_GPIO_COM3_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM3_PADS)
21 #define NUM_GPIO_COM4_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM4_PADS)
22 #define NUM_GPIO_COM5_GPI_REGS NUM_GPIO_COMx_GPI_REGS(NUM_GPIO_COM5_PADS)
23 
24 #define NUM_GPI_STATUS_REGS \
25  ((NUM_GPIO_COM0_GPI_REGS) +\
26  (NUM_GPIO_COM1_GPI_REGS) +\
27  (NUM_GPIO_COM2_GPI_REGS) +\
28  (NUM_GPIO_COM3_GPI_REGS) +\
29  (NUM_GPIO_COM4_GPI_REGS) +\
30  (NUM_GPIO_COM5_GPI_REGS))
31 /*
32  * IOxAPIC IRQs for the GPIOs
33  */
34 
35 /* Group B */
36 #define GPP_B0_IRQ 0x18
37 #define GPP_B1_IRQ 0x19
38 #define GPP_B2_IRQ 0x1A
39 #define GPP_B3_IRQ 0x1B
40 #define GPP_B4_IRQ 0x1C
41 #define GPP_B5_IRQ 0x1D
42 #define GPP_B6_IRQ 0x1E
43 #define GPP_B7_IRQ 0x1F
44 #define GPP_B8_IRQ 0x20
45 #define GPP_B9_IRQ 0x21
46 #define GPP_B10_IRQ 0x22
47 #define GPP_B11_IRQ 0x23
48 #define GPP_B12_IRQ 0x24
49 #define GPP_B13_IRQ 0x25
50 #define GPP_B14_IRQ 0x26
51 #define GPP_B15_IRQ 0x27
52 #define GPP_B16_IRQ 0x28
53 #define GPP_B17_IRQ 0x29
54 #define GPP_B18_IRQ 0x2A
55 #define GPP_B19_IRQ 0x2B
56 #define GPP_B20_IRQ 0x2C
57 #define GPP_B21_IRQ 0x2D
58 #define GPP_B22_IRQ 0x2E
59 #define GPP_B23_IRQ 0x2F
60 
61 /* Group T */
62 #define GPP_T0_IRQ 0x30
63 #define GPP_T1_IRQ 0x31
64 #define GPP_T2_IRQ 0x32
65 #define GPP_T3_IRQ 0x33
66 #define GPP_T4_IRQ 0x34
67 #define GPP_T5_IRQ 0x35
68 #define GPP_T6_IRQ 0x36
69 #define GPP_T7_IRQ 0x37
70 #define GPP_T8_IRQ 0x38
71 #define GPP_T9_IRQ 0x39
72 #define GPP_T10_IRQ 0x3A
73 #define GPP_T11_IRQ 0x3B
74 #define GPP_T12_IRQ 0x3C
75 #define GPP_T13_IRQ 0x3D
76 #define GPP_T14_IRQ 0x3E
77 #define GPP_T15_IRQ 0x3F
78 
79 /* Group G */
80 #define GPP_G0_IRQ 0x58
81 #define GPP_G1_IRQ 0x59
82 #define GPP_G2_IRQ 0x5A
83 #define GPP_G3_IRQ 0x5B
84 #define GPP_G4_IRQ 0x5C
85 #define GPP_G5_IRQ 0x5D
86 #define GPP_G6_IRQ 0x5E
87 #define GPP_G7_IRQ 0x5F
88 #define GPP_G8_IRQ 0x60
89 #define GPP_G9_IRQ 0x61
90 #define GPP_G10_IRQ 0x62
91 #define GPP_G11_IRQ 0x63
92 #define GPP_G12_IRQ 0x64
93 #define GPP_G13_IRQ 0x65
94 #define GPP_G14_IRQ 0x66
95 #define GPP_G15_IRQ 0x67
96 #define GPP_G16_IRQ 0x68
97 #define GPP_G17_IRQ 0x69
98 #define GPP_G18_IRQ 0x6A
99 #define GPP_G19_IRQ 0x6B
100 #define GPP_G20_IRQ 0x6C
101 #define GPP_G21_IRQ 0x6D
102 #define GPP_G22_IRQ 0x6E
103 #define GPP_G23_IRQ 0x6F
104 
105 /* Group R*/
106 #define GPP_R0_IRQ 0x70
107 #define GPP_R1_IRQ 0x71
108 #define GPP_R2_IRQ 0x72
109 #define GPP_R3_IRQ 0x73
110 #define GPP_R4_IRQ 0x74
111 #define GPP_R5_IRQ 0x75
112 #define GPP_R6_IRQ 0x76
113 #define GPP_R7_IRQ 0x77
114 
115 /* Group GPD */
116 #define GPD0_IRQ 0x21
117 #define GPD1_IRQ 0x22
118 #define GPD2_IRQ 0x23
119 #define GPD3_IRQ 0x24
120 #define GPD4_IRQ 0x25
121 #define GPD5_IRQ 0x26
122 #define GPD6_IRQ 0x27
123 #define GPD7_IRQ 0x28
124 #define GPD8_IRQ 0x29
125 #define GPD9_IRQ 0x2A
126 #define GPD10_IRQ 0x2B
127 #define GPD11_IRQ 0x6B
128 
129 /* Group V */
130 #define GPP_V0_IRQ 0x2C
131 #define GPP_V1_IRQ 0x2D
132 #define GPP_V2_IRQ 0x2E
133 #define GPP_V3_IRQ 0x2F
134 #define GPP_V4_IRQ 0x30
135 #define GPP_V5_IRQ 0x31
136 #define GPP_V6_IRQ 0x32
137 #define GPP_V7_IRQ 0x33
138 #define GPP_V8_IRQ 0x34
139 #define GPP_V9_IRQ 0x35
140 #define GPP_V10_IRQ 0x36
141 #define GPP_V11_IRQ 0x37
142 #define GPP_V12_IRQ 0x38
143 #define GPP_V13_IRQ 0x39
144 #define GPP_V14_IRQ 0x3A
145 #define GPP_V15_IRQ 0x3B
146 
147 /* Group H */
148 #define GPP_H0_IRQ 0x3C
149 #define GPP_H1_IRQ 0x3D
150 #define GPP_H2_IRQ 0x3E
151 #define GPP_H3_IRQ 0x3F
152 #define GPP_H4_IRQ 0x40
153 #define GPP_H5_IRQ 0x41
154 #define GPP_H6_IRQ 0x42
155 #define GPP_H7_IRQ 0x43
156 #define GPP_H8_IRQ 0x44
157 #define GPP_H9_IRQ 0x45
158 #define GPP_H10_IRQ 0x46
159 #define GPP_H11_IRQ 0x47
160 #define GPP_H12_IRQ 0x48
161 #define GPP_H13_IRQ 0x49
162 #define GPP_H14_IRQ 0x4A
163 #define GPP_H15_IRQ 0x4B
164 #define GPP_H16_IRQ 0x4C
165 #define GPP_H17_IRQ 0x4D
166 #define GPP_H18_IRQ 0x4E
167 #define GPP_H19_IRQ 0x4F
168 #define GPP_H20_IRQ 0x50
169 #define GPP_H21_IRQ 0x51
170 #define GPP_H22_IRQ 0x52
171 #define GPP_H23_IRQ 0x53
172 
173 /* Group D */
174 #define GPP_D0_IRQ 0x54
175 #define GPP_D1_IRQ 0x6E
176 #define GPP_D2_IRQ 0x6F
177 #define GPP_D3_IRQ 0x70
178 #define GPP_D4_IRQ 0x71
179 #define GPP_D5_IRQ 0x72
180 #define GPP_D6_IRQ 0x73
181 #define GPP_D7_IRQ 0x74
182 #define GPP_D8_IRQ 0x75
183 #define GPP_D9_IRQ 0x76
184 #define GPP_D10_IRQ 0x77
185 #define GPP_D11_IRQ 0x18
186 #define GPP_D12_IRQ 0x19
187 #define GPP_D13_IRQ 0x1A
188 #define GPP_D14_IRQ 0x1B
189 #define GPP_D15_IRQ 0x1C
190 #define GPP_D16_IRQ 0x1D
191 #define GPP_D17_IRQ 0x1E
192 #define GPP_D18_IRQ 0x1F
193 #define GPP_D19_IRQ 0x20
194 
195 /* Group U */
196 #define GPP_U0_IRQ 0x22
197 #define GPP_U1_IRQ 0x23
198 #define GPP_U2_IRQ 0x24
199 #define GPP_U3_IRQ 0x25
200 #define GPP_U4_IRQ 0x56
201 #define GPP_U5_IRQ 0x57
202 #define GPP_U6_IRQ 0x58
203 #define GPP_U7_IRQ 0x59
204 #define GPP_U8_IRQ 0x5A
205 #define GPP_U9_IRQ 0x5B
206 #define GPP_U10_IRQ 0x5C
207 #define GPP_U11_IRQ 0x5D
208 #define GPP_U12_IRQ 0x5E
209 #define GPP_U13_IRQ 0x5F
210 #define GPP_U14_IRQ 0x60
211 #define GPP_U15_IRQ 0x61
212 #define GPP_U16_IRQ 0x62
213 #define GPP_U17_IRQ 0x63
214 #define GPP_U18_IRQ 0x64
215 #define GPP_U19_IRQ 0x65
216 
217 /* Group VGPIO */
218 #define VGPIO_4_IRQ 0x6B
219 #define VGPIO_39_IRQ 0x43
220 
221 /* Group C */
222 #define GPP_C0_IRQ 0x6E
223 #define GPP_C1_IRQ 0x6F
224 #define GPP_C2_IRQ 0x70
225 #define GPP_C3_IRQ 0x71
226 #define GPP_C4_IRQ 0x72
227 #define GPP_C5_IRQ 0x73
228 #define GPP_C6_IRQ 0x74
229 #define GPP_C7_IRQ 0x75
230 #define GPP_C8_IRQ 0x76
231 #define GPP_C9_IRQ 0x77
232 #define GPP_C10_IRQ 0x18
233 #define GPP_C11_IRQ 0x19
234 #define GPP_C12_IRQ 0x1A
235 #define GPP_C13_IRQ 0x1B
236 #define GPP_C14_IRQ 0x1C
237 #define GPP_C15_IRQ 0x1D
238 #define GPP_C16_IRQ 0x1E
239 #define GPP_C17_IRQ 0x1F
240 #define GPP_C18_IRQ 0x20
241 #define GPP_C19_IRQ 0x21
242 #define GPP_C20_IRQ 0x22
243 #define GPP_C21_IRQ 0x23
244 #define GPP_C22_IRQ 0x24
245 #define GPP_C23_IRQ 0x25
246 
247 /* Group F */
248 #define GPP_F0_IRQ 0x56
249 #define GPP_F1_IRQ 0x57
250 #define GPP_F2_IRQ 0x58
251 #define GPP_F3_IRQ 0x59
252 #define GPP_F4_IRQ 0x5A
253 #define GPP_F5_IRQ 0x5B
254 #define GPP_F6_IRQ 0x5C
255 #define GPP_F7_IRQ 0x5D
256 #define GPP_F8_IRQ 0x5E
257 #define GPP_F9_IRQ 0x5F
258 #define GPP_F10_IRQ 0x60
259 #define GPP_F11_IRQ 0x61
260 #define GPP_F12_IRQ 0x62
261 #define GPP_F13_IRQ 0x63
262 #define GPP_F14_IRQ 0x64
263 #define GPP_F15_IRQ 0x65
264 #define GPP_F16_IRQ 0x66
265 #define GPP_F17_IRQ 0x67
266 #define GPP_F18_IRQ 0x68
267 #define GPP_F19_IRQ 0x69
268 #define GPP_F20_IRQ 0x6A
269 #define GPP_F21_IRQ 0x6B
270 #define GPP_F22_IRQ 0x6C
271 #define GPP_F23_IRQ 0x6D
272 
273 /* Group E */
274 #define GPP_E0_IRQ 0x26
275 #define GPP_E1_IRQ 0x27
276 #define GPP_E2_IRQ 0x28
277 #define GPP_E3_IRQ 0x29
278 #define GPP_E4_IRQ 0x30
279 #define GPP_E5_IRQ 0x31
280 #define GPP_E6_IRQ 0x32
281 #define GPP_E7_IRQ 0x33
282 #define GPP_E8_IRQ 0x34
283 #define GPP_E9_IRQ 0x35
284 #define GPP_E10_IRQ 0x36
285 #define GPP_E11_IRQ 0x37
286 #define GPP_E12_IRQ 0x38
287 #define GPP_E13_IRQ 0x39
288 #define GPP_E14_IRQ 0x3A
289 #define GPP_E15_IRQ 0x3B
290 #define GPP_E16_IRQ 0x3C
291 #define GPP_E17_IRQ 0x3D
292 #define GPP_E18_IRQ 0x3E
293 #define GPP_E19_IRQ 0x3F
294 #define GPP_E20_IRQ 0x40
295 #define GPP_E21_IRQ 0x41
296 #define GPP_E22_IRQ 0x42
297 #define GPP_E23_IRQ 0x43
298 
299 /* Group A */
300 #define GPP_A0_IRQ 0x40
301 #define GPP_A1_IRQ 0x41
302 #define GPP_A2_IRQ 0x42
303 #define GPP_A3_IRQ 0x43
304 #define GPP_A4_IRQ 0x44
305 #define GPP_A5_IRQ 0x45
306 #define GPP_A6_IRQ 0x46
307 #define GPP_A7_IRQ 0x47
308 #define GPP_A8_IRQ 0x48
309 #define GPP_A9_IRQ 0x49
310 #define GPP_A10_IRQ 0x4A
311 #define GPP_A11_IRQ 0x4B
312 #define GPP_A12_IRQ 0x4C
313 #define GPP_A13_IRQ 0x4D
314 #define GPP_A14_IRQ 0x4E
315 #define GPP_A15_IRQ 0x4F
316 #define GPP_A16_IRQ 0x50
317 #define GPP_A17_IRQ 0x51
318 #define GPP_A18_IRQ 0x52
319 #define GPP_A19_IRQ 0x53
320 #define GPP_A20_IRQ 0x54
321 #define GPP_A21_IRQ 0x55
322 #define GPP_A22_IRQ 0x56
323 #define GPP_A23_IRQ 0x57
324 
325 /* Register defines. */
326 #define GPIO_MISCCFG 0x10
327 #define GPE_DW_SHIFT 8
328 #define GPE_DW_MASK 0xfff00
329 #define HOSTSW_OWN_REG_0 0xb0
330 #define GPI_INT_STS_0 0x100
331 #define GPI_INT_EN_0 0x120
332 #define GPI_SMI_STS_0 0x180
333 #define GPI_SMI_EN_0 0x1a0
334 #define GPI_NMI_STS_0 0x1c0
335 #define GPI_NMI_EN_0 0x1e0
336 #define PAD_CFG_BASE 0x700
337 
338 #endif