coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hda_verb.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/azalia_device.h
>
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const
u32
cim_verb_data
[] = {
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/* coreboot specific header */
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0x10ec0269,
/* Codec Vendor / Device ID: Realtek ALC269 */
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0x10ec111e,
/* Subsystem ID */
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15,
/* Number of jacks (NID entries) */
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/* Reset Codec First */
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AZALIA_RESET
(0x1),
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/* HDA Codec Subsystem ID */
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AZALIA_SUBVENDOR
(0, 0x1C6C1240),
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/* Pin Widget Verb-table */
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AZALIA_PIN_CFG
(0, 0x01, 0x00000000),
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AZALIA_PIN_CFG
(0, 0x12, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x14, 0x94171110),
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AZALIA_PIN_CFG
(0, 0x17, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x18, 0x04ab1020),
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AZALIA_PIN_CFG
(0, 0x19, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x1a, 0x93171110),
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AZALIA_PIN_CFG
(0, 0x1b, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x1d, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x1e, 0x411111f0),
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AZALIA_PIN_CFG
(0, 0x21, 0x042b1010),
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0x00370600,
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0x00270600,
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0x00b707C0,
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0x00d70740,
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0x0017a200,
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0x0017c621,
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0x0017a208,
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0x00170500,
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0x8086280d,
/* Codec Vendor / Device ID: Intel */
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0x80860101,
/* Subsystem ID */
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4,
/* Number of 4 dword sets */
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AZALIA_SUBVENDOR
(2, 0x80860101),
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AZALIA_PIN_CFG
(2, 0x05, 0x18560010),
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AZALIA_PIN_CFG
(2, 0x06, 0x18560020),
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AZALIA_PIN_CFG
(2, 0x07, 0x18560030),
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};
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const
u32
pc_beep_verbs
[] = {
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};
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AZALIA_ARRAY_SIZES
;
azalia_device.h
AZALIA_SUBVENDOR
#define AZALIA_SUBVENDOR(codec, val)
Definition:
azalia_device.h:148
AZALIA_PIN_CFG
#define AZALIA_PIN_CFG(codec, pin, val)
Definition:
azalia_device.h:134
AZALIA_RESET
#define AZALIA_RESET(pin)
Definition:
azalia_device.h:142
cim_verb_data
const u32 cim_verb_data[]
Definition:
hda_verb.c:5
pc_beep_verbs
const u32 pc_beep_verbs[]
Definition:
hda_verb.c:37
AZALIA_ARRAY_SIZES
AZALIA_ARRAY_SIZES
Definition:
hda_verb.c:39
u32
uint32_t u32
Definition:
stdint.h:51
src
mainboard
starlabs
lite
variants
glkr
hda_verb.c
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