coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
psp_verstage_addr.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef AMD_CEZANNE_PSP_VERSTAGE_ADDR_H
4 #define AMD_CEZANNE_PSP_VERSTAGE_ADDR_H
5 
6 /*
7  * Start of available space is 0x36000 and this is where the
8  * header for the user app (verstage) must be mapped.
9  * Size is 0x14000 bytes
10  */
11 #define PSP_SRAM_START 0x26000
12 #define PSP_SRAM_SIZE (148K)
13 #define VERSTAGE_START PSP_SRAM_START
14 
15 /*
16  * The top of the stack must be 4k aligned, so set the bottom as 4k aligned
17  * and make the size a multiple of 4k
18  */
19 
20 #define PSP_VERSTAGE_STACK_START 0x41000
21 #define PSP_VERSTAGE_STACK_SIZE (40K)
22 
23 #endif /* AMD_CEZANNE_PSP_VERSTAGE_ADDR_H */