coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hda_verb.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/azalia_device.h>
4 
5 const u32 cim_verb_data[] = {
6  /* coreboot specific header */
7  0x10ec0256, /* Codec Vendor / Device ID: Realtek ALC256 */
8  0x10ec1200, /* Subsystem ID */
9  38, /* Number of jacks (NID entries) */
10 
11  /* Reset Codec First */
12  AZALIA_RESET(0x1),
13 
14  /* HDA Codec Subsystem ID */
15  AZALIA_SUBVENDOR(0, 0x10ec1200),
16 
17  /* Pin Widget Verb-table */
18  AZALIA_PIN_CFG(0, 0x01, 0x00000000),
19  AZALIA_PIN_CFG(0, 0x12, 0x90a61120),
20  AZALIA_PIN_CFG(0, 0x13, 0x40000000),
21  AZALIA_PIN_CFG(0, 0x14, 0x90171110),
22  AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
23  AZALIA_PIN_CFG(0, 0x19, 0x04ab1020),
24  AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
25  AZALIA_PIN_CFG(0, 0x1b, 0x40700001),
26  AZALIA_PIN_CFG(0, 0x1d, 0x411111f0),
27  AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
28  AZALIA_PIN_CFG(0, 0x21, 0x042b1010),
29 
30  /* Reset to D0 */
31  0x00170500,
32  0x00170500,
33  0x00170500,
34  0x00170500,
35 
36  /* Reset Register */
37  0x0205001A,
38  0x02048003,
39  0x0205001A,
40  0x0204C003,
41 
42  /* ALC256 Default 1 */
43  0x0205003C,
44  0x02040354,
45  0x0205003C,
46  0x02040314,
47 
48  /* ALC256 Default 2 */
49  0x02050040,
50  0x02049800,
51  0x02050034,
52  0x0204023C,
53 
54  /* ALC256 Default 3 */
55  0x05750003,
56  0x05740DA3,
57  0x02050046,
58  0x02040004,
59 
60  /* ALC256 Default 4 */
61  0x0205001B,
62  0x02040A4B,
63  0x02050008,
64  0x02046A6C,
65 
66  /* Jack Detection */
67  0x02050009,
68  0x0204E003,
69  0x0205000A,
70  0x02047770,
71 
72  /* Combo Jack TRS setting */
73  0x02050038,
74  0x02047901,
75 
76  /* Disable Microphone Security */
77  0x0205000D,
78  0x0204A020,
79 
80  /* Enable ADC clock */
81  0x02050005,
82  0x02040700,
83 
84  /* Speaker Enable */
85  0x0205000C,
86  0x020401EF,
87 
88  /*
89  * Equalizer:
90  *
91  * AGC
92  * Threshold: - 6.00 dB
93  * Front Boost: + 6.00 dB
94  * Post Boost: + 6.00 dB
95  *
96  * Low Pass Filter
97  * Boost Gain: Enabled
98  * BW: 200Hz
99  * Gain: + 4.00 dB
100  *
101  * Band Pass Filter 1
102  * Fc: 240Hz
103  * BW: 400Hz
104  * Gain: - 4.00 dB
105  *
106  * Band Pass Filter 2
107  * Fc: 16000Hz
108  * BW: 1000Hz
109  * Gain: + 12.00 dB
110  *
111  * High Pass Filter
112  * Boost Gain: Enabled
113  * BW: 200Hz
114  * Gain: - 4.00 dB
115  *
116  * Class D Amp
117  * Power: 2.5W
118  * Resistance: 4ohms
119  *
120  * EQ Output
121  * Left: + 0.00 dB
122  * Right: + 0.00 dB
123  *
124  * VARQ
125  * Q: 0.707
126  */
127 
128  0x05350000,
129  0x053404DA,
130  0x0535001d,
131  0x05340800,
132 
133  0x0535001e,
134  0x05340800,
135  0x05350003,
136  0x05341F7A,
137 
138  0x05350004,
139  0x0534FA18,
140  0x0535000F,
141  0x0534C295,
142 
143  0x05350010,
144  0x05341D73,
145  0x05350011,
146  0x0534FA18,
147 
148  0x05350012,
149  0x05341E08,
150  0x05350013,
151  0x05341C10,
152 
153  0x05350014,
154  0x05342FB2,
155  0x0535001B,
156  0x05341F2C,
157 
158  0x0535001C,
159  0x0534095C,
160  0x05450000,
161  0x05440000,
162 
163  0x0545001d,
164  0x05440800,
165  0x0545001e,
166  0x05440800,
167 
168  0x05450003,
169  0x05441F7A,
170  0x05450004,
171  0x0544FA18,
172 
173  0x0545000F,
174  0x0544C295,
175  0x05450010,
176  0x05441D73,
177 
178  0x05450011,
179  0x0544FA18,
180  0x05450012,
181  0x05441E08,
182 
183  0x05450013,
184  0x05441C10,
185  0x05450014,
186  0x05442FB2,
187 
188  0x0545001B,
189  0x05441F2C,
190  0x0545001C,
191  0x0544095C,
192 
193  0x05350000,
194  0x0534C4DA,
195  0x02050038,
196  0x02044901,
197 
198  0x02050013,
199  0x0204422F,
200  0x02050016,
201  0x02044E50,
202 
203  0x02050012,
204  0x0204EBC4,
205  0x02050020,
206  0x020451FF,
207 
208  0x8086280b, /* Codec Vendor / Device ID: Intel */
209  0x80860101, /* Subsystem ID */
210  4, /* Number of 4 dword sets */
211 
212  AZALIA_SUBVENDOR(2, 0x80860101),
213 
214  AZALIA_PIN_CFG(2, 0x05, 0x18560010),
215  AZALIA_PIN_CFG(2, 0x06, 0x18560010),
216  AZALIA_PIN_CFG(2, 0x07, 0x18560010),
217 };
218 
219 const u32 pc_beep_verbs[] = {};
220 
221 AZALIA_ARRAY_SIZES;
azalia_device.h
AZALIA_SUBVENDOR
#define AZALIA_SUBVENDOR(codec, val)
Definition: azalia_device.h:148
AZALIA_PIN_CFG
#define AZALIA_PIN_CFG(codec, pin, val)
Definition: azalia_device.h:134
AZALIA_RESET
#define AZALIA_RESET(pin)
Definition: azalia_device.h:142
cim_verb_data
const u32 cim_verb_data[]
Definition: hda_verb.c:5
pc_beep_verbs
const u32 pc_beep_verbs[]
Definition: hda_verb.c:37
AZALIA_ARRAY_SIZES
AZALIA_ARRAY_SIZES
Definition: hda_verb.c:39
u32
uint32_t u32
Definition: stdint.h:51