coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/variants.h>
4 #include <console/console.h>
5 #include <cpu/x86/smm.h>
8 #include <elog.h>
9 #include <variant/ec.h>
10 
11 void mainboard_smi_gpi(u32 gpi_sts)
12 {
13  printk(BIOS_WARNING, "No GPIO is set up as PAD_SMI, so %s should never end up being "
14  "called. gpi_status is %x.\n", __func__, gpi_sts);
15 }
16 
17 void mainboard_smi_sleep(u8 slp_typ)
18 {
19  size_t num_gpios;
20  const struct soc_amd_gpio *gpios;
21 
23 
24  gpios = variant_sleep_gpio_table(&num_gpios);
25  gpio_configure_pads(gpios, num_gpios);
26 }
27 
29 {
31 
32  return 0;
33 }
#define printk(level,...)
Definition: stdlib.h:16
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition: smihandler.c:208
void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
Definition: smihandler.c:48
void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
Definition: smihandler.c:89
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition: ec.h:32
#define MAINBOARD_EC_SCI_EVENTS
Definition: ec.h:12
#define MAINBOARD_EC_SMI_EVENTS
Definition: ec.h:28
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition: ec.h:37
const struct pad_config *__weak variant_sleep_gpio_table(size_t *num)
Definition: gpio.c:466
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition: gpio.c:307
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45