coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
dmibar.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#ifndef HASWELL_REGISTERS_DMIBAR_H
4
#define HASWELL_REGISTERS_DMIBAR_H
5
6
#define DMIVCECH 0x000
/* 32bit */
7
#define DMIPVCCAP1 0x004
/* 32bit */
8
#define DMIPVCCAP2 0x008
/* 32bit */
9
#define DMIPVCCCTL 0x00c
/* 16bit */
10
11
#define DMIVC0RCAP 0x010
/* 32bit */
12
#define DMIVC0RCTL 0x014
/* 32bit */
13
#define DMIVC0RSTS 0x01a
/* 16bit */
14
#define VC0NP (1 << 1)
15
16
#define DMIVC1RCAP 0x01c
/* 32bit */
17
#define DMIVC1RCTL 0x020
/* 32bit */
18
#define DMIVC1RSTS 0x026
/* 16bit */
19
#define VC1NP (1 << 1)
20
21
#define DMIVCPRCAP 0x028
/* 32bit */
22
#define DMIVCPRCTL 0x02c
/* 32bit */
23
#define DMIVCPRSTS 0x032
/* 16bit */
24
#define VCPNP (1 << 1)
25
26
#define DMIVCMRCAP 0x034
/* 32bit */
27
#define DMIVCMRCTL 0x038
/* 32bit */
28
#define DMIVCMRSTS 0x03e
/* 16bit */
29
#define VCMNP (1 << 1)
30
31
#define DMIRCLDECH 0x040
/* 32bit */
32
#define DMIESD 0x044
/* 32bit */
33
34
#define DMILE1D 0x050
/* 32bit */
35
#define DMILE1A 0x058
/* 64bit */
36
#define DMILE2D 0x060
/* 32bit */
37
#define DMILE2A 0x068
/* 64bit */
38
39
#define DMILCAP 0x084
/* 32bit */
40
#define DMILCTL 0x088
/* 16bit */
41
#define DMILSTS 0x08a
/* 16bit */
42
43
#define DMILCTL2 0x098
/* 16bit */
44
#define DMILSTS2 0x09c
/* 16bit */
45
46
#define DMIUESTS 0x1c4
/* 32bit */
47
#define DMICESTS 0x1d0
/* 32bit */
48
49
#define DMICC 0x208
/* 32bit */
50
51
#define DMIL0SLAT 0x22c
/* 32bit */
52
#define DMILLTC 0x238
/* 32bit */
53
54
#define DMI_AFE_PM_TMR 0xc28
/* 32bit */
55
56
#endif
/* HASWELL_REGISTERS_DMIBAR_H */
src
northbridge
intel
haswell
registers
dmibar.h
Generated by
1.9.1