coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootblock_common.h>
4 #include <soc/spi.h>
5 
6 #include "gpio.h"
7 
8 void bootblock_mainboard_init(void)
9 {
10  mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
11  mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0);
12  setup_chromeos_gpios();
13  gpio_eint_configure(GPIO_H1_AP_INT, IRQ_TYPE_EDGE_RISING);
14 }
bootblock_common.h
MHz
#define MHz
Definition: helpers.h:80
setup_chromeos_gpios
void setup_chromeos_gpios(void)
Definition: chromeos.c:10
bootblock_mainboard_init
__weak void bootblock_mainboard_init(void)
Definition: bootblock.c:19
GPIO_H1_AP_INT
#define GPIO_H1_AP_INT
Definition: gpio.h:12
IRQ_TYPE_EDGE_RISING
@ IRQ_TYPE_EDGE_RISING
Definition: gpio_common.h:55
gpio_eint_configure
void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
Definition: gpio.c:142
SPI_PAD0_MASK
@ SPI_PAD0_MASK
Definition: spi_common.h:46
mtk_spi_init
void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, unsigned int speed_hz, unsigned int tick_dly)
Definition: spi.c:56