coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <delay.h>
4 #include <gpio.h>
5 #include <baseboard/variants.h>
6 #include <soc/gpio.h>
7 
9 {
10  /*
11  * Assert FPMCU reset and enable power to FPMCU,
12  * wait for power rail to stabilize,
13  * and then deassert FPMCU reset.
14  * Waiting for the power rail to stabilize can take a while.
15  */
16  gpio_output(GPP_C23, 0);
17  gpio_output(GPP_A21, 1);
18  mdelay(1);
19  gpio_output(GPP_C23, 1);
20 }
#define GPP_C23
#define GPP_A21
void mdelay(unsigned int msecs)
Definition: delay.c:2
void gpio_output(gpio_t gpio, int value)
Definition: gpio.c:194
void __weak variant_ramstage_init(void)
Definition: ramstage.c:19