coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nct5539d.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef SUPERIO_NUVOTON_NCT5539D_H
4 #define SUPERIO_NUVOTON_NCT5539D_H
5 
6 /* Logical Device Numbers (LDN). */
7 #define NCT5539D_SP1 0x02 /* UART A */
8 #define NCT5539D_KBC 0x05 /* Keyboard Controller */
9 #define NCT5539D_CIR 0x06 /* Consumer IR */
10 #define NCT5539D_GPIO78 0x07 /* GPIO 7 & 8 */
11 #define NCT5539D_WDT1_WDT3_GPIO0 0x08 /* WDT1, WDT3, GPIO 0 & KBC P20 */
12 #define NCT5539D_GPIO2345 0x09 /* GPIO 2, 3, 4 & 5 */
13 #define NCT5539D_ACPI 0x0A /* ACPI */
14 #define NCT5539D_HWM_FPLED 0x0B /* HW Monitor, Front Panel LED */
15 #define NCT5539D_WDT2 0x0D /* WDT2 */
16 #define NCT5539D_CIRWUP 0x0E /* CIR Wake-Up */
17 #define NCT5539D_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open-Drain */
18 #define NCT5539D_GPIO_PSO 0x11 /* GPIO, RI PSOUT Wake-Up Status */
19 #define NCT5539D_SWEC 0x12 /* SW Error Control */
20 #define NCT5539D_FLED 0x15 /* Fading LED */
21 #define NCT5539D_DS 0x16 /* Deep Sleep */
22 
23 /* Virtual LDNs */
24 #define NCT5539D_WDT1 ((0 << 8) | NCT5539D_WDT1_WDT3_GPIO0)
25 #define NCT5539D_WDT3 ((4 << 8) | NCT5539D_WDT1_WDT3_GPIO0)
26 #define NCT5539D_GPIOBASE ((3 << 8) | NCT5539D_WDT1_WDT3_GPIO0)
27 #define NCT5539D_GPIO0 ((1 << 8) | NCT5539D_WDT1_WDT3_GPIO0)
28 #define NCT5539D_GPIO2 ((0 << 8) | NCT5539D_GPIO2345)
29 #define NCT5539D_GPIO3 ((1 << 8) | NCT5539D_GPIO2345)
30 #define NCT5539D_GPIO4 ((2 << 8) | NCT5539D_GPIO2345)
31 #define NCT5539D_GPIO5 ((3 << 8) | NCT5539D_GPIO2345)
32 #define NCT5539D_GPIO7 ((1 << 8) | NCT5539D_GPIO78)
33 #define NCT5539D_GPIO8 ((2 << 8) | NCT5539D_GPIO78)
34 #define NCT5539D_DS5 ((0 << 8) | NCT5539D_DS)
35 #define NCT5539D_DS3 ((1 << 8) | NCT5539D_DS)
36 
37 #endif /* SUPERIO_NUVOTON_NCT5539D_H */