coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* TODO: Check if this is still correct */
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#ifndef AMD_SABRINA_LPC_H
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#define AMD_SABRINA_LPC_H
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/* LPC_MISC_CONTROL_BITS at D14F3x078 */
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/* The definitions of bits 9 and 10 are swapped on Picasso and older compared to Renoir/Cezanne
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and newer, so we need to keep those in a SoC-specific header file. */
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#define LPC_LDRQ0_PU_EN BIT(10)
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#define LPC_LDRQ0_PD_EN BIT(9)
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#define SPI_BASE_ADDRESS_REGISTER 0xa0
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#define SPI_BASE_ALIGNMENT BIT(8)
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#define SPI_BASE_RESERVED (BIT(5) | BIT(6) | BIT(7))
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#define PSP_SPI_MMIO_SEL BIT(4)
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#define ROUTE_TPM_2_SPI BIT(3)
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#define SPI_ABORT_ENABLE BIT(2)
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#define SPI_ROM_ENABLE BIT(1)
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#define SPI_ROM_ALT_ENABLE BIT(0)
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#define SPI_PRESERVE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
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#endif
/* AMD_SABRINA_LPC_H */
src
soc
amd
sabrina
include
soc
lpc.h
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