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gpio_soc_defs.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _SOC_TIGERLAKE_GPIO_SOC_DEFS_H_
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#define _SOC_TIGERLAKE_GPIO_SOC_DEFS_H_
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/*
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* Most of the fixed numbers and macros are based on the GPP groups.
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* The GPIO groups are accessed through register blocks called
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* communities.
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*/
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#define GPP_B 0x0
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#define GPP_T 0x1
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#define GPP_A 0x2
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#define GPP_R 0x3
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#define GPD 0x4
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#define GPP_S 0x5
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#define GPP_H 0x6
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#define GPP_D 0x7
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#define GPP_U 0x8
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#define GPP_F 0xA
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#define GPP_C 0xB
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#define GPP_E 0xC
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#define GPIO_MAX_NUM_PER_GROUP 27
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#define COMM_0 0
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#define COMM_1 1
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#define COMM_2 2
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/* GPIO community 3 is not exposed to be used and hence is skipped. */
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#define COMM_4 3
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#define COMM_5 4
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/*
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* GPIOs are ordered monotonically increasing to match ACPI/OS driver.
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*/
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/* Group B */
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#define GPP_B0 0
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#define GPP_B1 1
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#define GPP_B2 2
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#define GPP_B3 3
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#define GPP_B4 4
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#define GPP_B5 5
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#define GPP_B6 6
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#define GPP_B7 7
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#define GPP_B8 8
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#define GPP_B9 9
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#define GPP_B10 10
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#define GPP_B11 11
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#define GPP_B12 12
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#define GPP_B13 13
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#define GPP_B14 14
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#define GPP_B15 15
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#define GPP_B16 16
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#define GPP_B17 17
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#define GPP_B18 18
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#define GPP_B19 19
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#define GPP_B20 20
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#define GPP_B21 21
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#define GPP_B22 22
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#define GPP_B23 23
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#define GPP_B24 24
/* GSPI0_CLK_LOOPBK */
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#define GPP_B25 25
/* GSPI1_CLK_LOOPBK */
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/* Group T */
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#define GPP_T0 26
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#define GPP_T1 27
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#define GPP_T2 28
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#define GPP_T3 29
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#define GPP_T4 30
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#define GPP_T5 31
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#define GPP_T6 32
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#define GPP_T7 33
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#define GPP_T8 34
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#define GPP_T9 35
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#define GPP_T10 36
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#define GPP_T11 37
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#define GPP_T12 38
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#define GPP_T13 39
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#define GPP_T14 40
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#define GPP_T15 41
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/* Group A */
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#define GPP_A0 42
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#define GPP_A1 43
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#define GPP_A2 44
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#define GPP_A3 45
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#define GPP_A4 46
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#define GPP_A5 47
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#define GPP_A6 48
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#define GPP_A7 49
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#define GPP_A8 50
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#define GPP_A9 51
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#define GPP_A10 52
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#define GPP_A11 53
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#define GPP_A12 54
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#define GPP_A13 55
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#define GPP_A14 56
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#define GPP_A15 57
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#define GPP_A16 58
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#define GPP_A17 59
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#define GPP_A18 60
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#define GPP_A19 61
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#define GPP_A20 62
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#define GPP_A21 63
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#define GPP_A22 64
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#define GPP_A23 65
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#define GPP_A24 66
/* ESPI_CLK_LOOPBK */
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#define GPIO_COM0_START GPP_B0
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#define GPIO_COM0_END GPP_A24
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#define NUM_GPIO_COM0_PADS (GPP_A24 - GPP_B0 + 1)
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/* Group S */
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#define GPP_S0 67
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#define GPP_S1 68
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#define GPP_S2 69
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#define GPP_S3 70
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#define GPP_S4 71
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#define GPP_S5 72
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#define GPP_S6 73
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#define GPP_S7 74
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/* Group H */
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#define GPP_H0 75
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#define GPP_H1 76
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#define GPP_H2 77
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#define GPP_H3 78
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#define GPP_H4 79
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#define GPP_H5 80
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#define GPP_H6 81
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#define GPP_H7 82
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#define GPP_H8 83
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#define GPP_H9 84
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#define GPP_H10 85
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#define GPP_H11 86
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#define GPP_H12 87
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#define GPP_H13 88
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#define GPP_H14 89
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#define GPP_H15 90
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#define GPP_H16 91
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#define GPP_H17 92
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#define GPP_H18 93
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#define GPP_H19 94
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#define GPP_H20 95
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#define GPP_H21 96
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#define GPP_H22 97
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#define GPP_H23 98
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/* Group D */
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#define GPP_D0 99
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#define GPP_D1 100
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#define GPP_D2 101
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#define GPP_D3 102
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#define GPP_D4 103
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#define GPP_D5 104
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#define GPP_D6 105
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#define GPP_D7 106
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#define GPP_D8 107
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#define GPP_D9 108
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#define GPP_D10 109
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#define GPP_D11 110
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#define GPP_D12 111
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#define GPP_D13 112
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#define GPP_D14 113
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#define GPP_D15 114
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#define GPP_D16 115
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#define GPP_D17 116
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#define GPP_D18 117
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#define GPP_D19 118
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#define GPP_GSPI2_CLK_LOOPBK 119
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/* Group U */
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#define GPP_U0 120
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#define GPP_U1 121
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#define GPP_U2 122
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#define GPP_U3 123
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#define GPP_U4 124
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#define GPP_U5 125
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#define GPP_U6 126
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#define GPP_U7 127
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#define GPP_U8 128
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#define GPP_U9 129
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#define GPP_U10 130
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#define GPP_U11 131
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#define GPP_U12 132
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#define GPP_U13 133
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#define GPP_U14 134
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#define GPP_U15 135
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#define GPP_U16 136
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#define GPP_U17 137
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#define GPP_U18 138
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#define GPP_U19 139
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#define GPP_GSPI3_CLK_LOOPBK 140
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#define GPP_GSPI4_CLK_LOOPBK 141
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#define GPP_GSPI5_CLK_LOOPBK 142
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#define GPP_GSPI6_CLK_LOOPBK 143
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/* Group VGPIO */
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#define CNV_BTEN 144
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#define CNV_BT_HOST_WAKEB 145
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#define CNV_BT_IF_SELECT 146
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#define vCNV_BT_UART_TXD 147
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#define vCNV_BT_UART_RXD 148
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#define vCNV_BT_UART_CTS_B 149
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#define vCNV_BT_UART_RTS_B 150
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#define vCNV_MFUART1_TXD 151
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#define vCNV_MFUART1_RXD 152
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#define vCNV_MFUART1_CTS_B 153
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#define vCNV_MFUART1_RTS_B 154
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#define vUART0_TXD 155
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#define vUART0_RXD 156
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#define vUART0_CTS_B 157
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#define vUART0_RTS_B 158
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#define vISH_UART0_TXD 159
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#define vISH_UART0_RXD 160
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#define vISH_UART0_CTS_B 161
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#define vISH_UART0_RTS_B 162
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#define vCNV_BT_I2S_BCLK 163
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#define vCNV_BT_I2S_WS_SYNC 164
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#define vCNV_BT_I2S_SDO 165
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#define vCNV_BT_I2S_SDI 166
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#define vI2S2_SCLK 167
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#define vI2S2_SFRM 168
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#define vI2S2_TXD 169
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#define vI2S2_RXD 170
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#define GPIO_COM1_START GPP_S0
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#define GPIO_COM1_END vI2S2_RXD
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#define NUM_GPIO_COM1_PADS (vI2S2_RXD - GPP_S0 + 1)
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/* Group GPD */
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#define GPD0 171
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#define GPD1 172
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#define GPD2 173
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#define GPD3 174
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#define GPD4 175
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#define GPD5 176
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#define GPD6 177
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#define GPD7 178
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#define GPD8 179
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#define GPD9 180
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#define GPD10 181
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#define GPD11 182
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#define GPD_INPUT3VSEL 183
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#define GPD_SLP_LANB 184
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#define GPD_SLP_SUSB 185
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#define GPD_WAKEB 186
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#define GPD_DRAM_RESETB 187
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#define GPIO_COM2_START GPD0
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#define GPIO_COM2_END GPD_DRAM_RESETB
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#define NUM_GPIO_COM2_PADS (GPD_DRAM_RESETB - GPD0 + 1)
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/* Group C */
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#define GPP_C0 188
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#define GPP_C1 189
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#define GPP_C2 190
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#define GPP_C3 191
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#define GPP_C4 192
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#define GPP_C5 193
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#define GPP_C6 194
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#define GPP_C7 195
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#define GPP_C8 196
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#define GPP_C9 197
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#define GPP_C10 198
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#define GPP_C11 199
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#define GPP_C12 200
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#define GPP_C13 201
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#define GPP_C14 202
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#define GPP_C15 203
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#define GPP_C16 204
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#define GPP_C17 205
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#define GPP_C18 206
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#define GPP_C19 207
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#define GPP_C20 208
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#define GPP_C21 209
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#define GPP_C22 210
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#define GPP_C23 211
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/* Group F */
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#define GPP_F0 212
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#define GPP_F1 213
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#define GPP_F2 214
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#define GPP_F3 215
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#define GPP_F4 216
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#define GPP_F5 217
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#define GPP_F6 218
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#define GPP_F7 219
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#define GPP_F8 220
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#define GPP_F9 221
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#define GPP_F10 222
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#define GPP_F11 223
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#define GPP_F12 224
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#define GPP_F13 225
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#define GPP_F14 226
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#define GPP_F15 227
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#define GPP_F16 228
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#define GPP_F17 229
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#define GPP_F18 230
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#define GPP_F19 231
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#define GPP_F20 232
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#define GPP_F21 233
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#define GPP_F22 234
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#define GPP_F23 235
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#define GPP_F_CLK_LOOPBK 236
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/* Group HVCMOS */
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#define GPP_L_BKLTEN 237
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#define GPP_L_BKLTCTL 238
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#define GPP_L_VDDEN 239
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#define GPP_SYS_PWROK 240
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#define GPP_SYS_RESETB 241
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#define GPP_MLK_RSTB 242
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/* Group E */
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#define GPP_E0 243
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#define GPP_E1 244
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#define GPP_E2 245
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#define GPP_E3 246
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#define GPP_E4 247
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#define GPP_E5 248
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#define GPP_E6 249
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#define GPP_E7 250
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#define GPP_E8 251
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#define GPP_E9 252
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#define GPP_E10 253
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#define GPP_E11 254
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#define GPP_E12 255
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#define GPP_E13 256
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#define GPP_E14 257
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#define GPP_E15 258
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#define GPP_E16 259
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#define GPP_E17 260
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#define GPP_E18 261
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#define GPP_E19 262
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#define GPP_E20 263
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#define GPP_E21 264
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#define GPP_E22 265
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#define GPP_E23 266
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#define GPP_E_CLK_LOOPBK 267
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/* Group JTAG */
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#define GPP_JTAG_TDO 268
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#define GPP_JTAG_X 269
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#define GPP_JTAG_PRDYB 270
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#define GPP_JTAG_PREQB 271
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#define GPP_CPU_TRSTB 272
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#define GPP_JTAG_TDI 273
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#define GPP_JTAG_TMS 274
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#define GPP_JTAG_TCK 275
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#define GPP_DBG_PMODE 276
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#define GPIO_COM4_START GPP_C0
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#define GPIO_COM4_END GPP_DBG_PMODE
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#define NUM_GPIO_COM4_PADS (GPP_DBG_PMODE - GPP_C0 + 1)
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/* Group R */
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#define GPP_R0 277
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#define GPP_R1 278
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#define GPP_R2 279
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#define GPP_R3 280
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#define GPP_R4 281
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#define GPP_R5 282
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#define GPP_R6 283
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#define GPP_R7 284
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/* Group SPI */
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#define GPP_SPI_IO_2 285
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#define GPP_SPI_IO_3 286
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#define GPP_SPI_MOSI_IO_0 287
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#define GPP_SPI_MOSI_IO_1 288
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#define GPP_SPI_TPM_CSB 289
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#define GPP_SPI_FLASH_0_CSB 290
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#define GPP_SPI_FLASH_1_CSB 291
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#define GPP_SPI_CLK 292
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#define GPP_CLK_LOOPBK 293
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#define GPIO_COM5_START GPP_R0
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#define GPIO_COM5_END GPP_CLK_LOOPBK
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#define NUM_GPIO_COM5_PADS (GPP_CLK_LOOPBK - GPP_R0 + 1)
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#define TOTAL_GPIO_COMM (COMM_5 + 1)
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#define TOTAL_PADS 294
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#endif
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intel
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gpio_soc_defs.h
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