coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
it8613e.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3
#ifndef SUPERIO_ITE_IT8613E_H
4
#define SUPERIO_ITE_IT8613E_H
5
6
/*
7
* IT8613 supports 2 clock inputs: PCICLK and CLKIN. Multiple registers need
8
* to be set to choose proper source. PCICLK is required for LPC.
9
*
10
* In the table below PD means pull-down, X - don't care.
11
*
12
* |-------------------------------------------------------------------|
13
* | CLKIN | PCICLK | LDN7\ | GBL\ | LDN7\ | LDN7\ | GBL\ |
14
* | | | 71h[3] | 23h[3] | 2Dh[2] | 2Dh[1] | 23h[0] |
15
* |--------+--------+---------+---------+---------+---------+---------|
16
* | PD | 33 MHz | X | 0 | 0 | 0 | 0 |
17
* | PD | 24 MHz | 1 | 1 | X | 0 | 1 |
18
* | PD | 25 MHz | X | 0 | 1 | 0 | 0 |
19
* | 24 MHz | X | 0 | 1 | X | 0 | 1 |
20
* | 48 MHz | X | 0 | 1 | X | 0 | 0 |
21
* |-------------------------------------------------------------------|
22
*
23
*/
24
25
#define IT8613E_SP1 0x01
/* Com1 */
26
#define IT8613E_EC 0x04
/* Environment controller */
27
#define IT8613E_KBCK 0x05
/* PS/2 keyboard */
28
#define IT8613E_KBCM 0x06
/* PS/2 mouse */
29
#define IT8613E_GPIO 0x07
/* GPIO */
30
#define IT8613E_CIR 0x0a
/* Consumer Infrared */
31
32
#endif
/* SUPERIO_ITE_IT8613E_H */
src
superio
ite
it8613e
it8613e.h
Generated by
1.9.1