coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pc87417.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef SUPERIO_NSC_PC87417_H
4 #define SUPERIO_NSC_PC87417_H
5 
6 #define PC87417_FDC 0x00 /* Floppy */
7 #define PC87417_PP 0x01 /* Parallel Port */
8 #define PC87417_SP2 0x02 /* Com2 */
9 #define PC87417_SP1 0x03 /* Com1 */
10 #define PC87417_SWC 0x04 /* System Wake-Up Controller (SWC) */
11 #define PC87417_KBCM 0x05 /* Mouse */
12 #define PC87417_KBCK 0x06 /* Keyboard */
13 #define PC87417_GPIO 0x07
14 #define PC87417_XBUS 0x0F
15 #define PC87417_RTC 0x10
16 
17 #define PC87417_GPIO_DEV PNP_DEV(0x2e, PC87417_GPIO)
18 #define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS)
19 
20 #define PC87417_GPSEL 0xf0
21 #define PC87417_GPCFG1 0xf1
22 #define PC87417_GPEVR 0xf2
23 #define PC87417_GPCFG2 0xf3
24 #define PC87417_EXTCFG 0xf4
25 #define PC87417_IOEXT1A 0xf5
26 #define PC87417_IOEXT1B 0xf6
27 #define PC87417_IOEXT2A 0xf7
28 #define PC87417_IOEXT2B 0xf8
29 
30 #define PC87417_GPDO_0 0x00
31 #define PC87417_GPDI_0 0x01
32 #define PC87417_GPDO_1 0x02
33 #define PC87417_GPDI_1 0x03
34 #define PC87417_GPEVEN_1 0x04
35 #define PC87417_GPEVST_1 0x05
36 #define PC87417_GPDO_2 0x06
37 #define PC87417_GPDI_2 0x07
38 #define PC87417_GPDO_3 0x08
39 #define PC87417_GPDI_3 0x09
40 #define PC87417_GPDO_4 0x0a
41 #define PC87417_GPDI_4 0x0b
42 #define PC87417_GPEVEN_4 0x0c
43 #define PC87417_GPEVST_4 0x0d
44 #define PC87417_GPDO_5 0x0e
45 #define PC87417_GPDI_5 0x0f
46 #define PC87417_GPDO_6 0x10
47 #define PC87417_GPDO_7A 0x11
48 #define PC87417_GPDO_7B 0x12
49 #define PC87417_GPDO_7C 0x13
50 #define PC87417_GPDO_7D 0x14
51 #define PC87417_GPDI_7A 0x15
52 #define PC87417_GPDI_7B 0x16
53 #define PC87417_GPDI_7C 0x17
54 #define PC87417_GPDI_7D 0x18
55 
56 #define PC87417_XIOCNF 0xf0
57 #define PC87417_XIOBA1H 0xf1
58 #define PC87417_XIOBA1L 0xf2
59 #define PC87417_XIOSIZE1 0xf3
60 #define PC87417_XIOBA2H 0xf4
61 #define PC87417_XIOBA2L 0xf5
62 #define PC87417_XIOSIZE2 0xf6
63 #define PC87417_XMEMCNF1 0xf7
64 #define PC87417_XMEMCNF2 0xf8
65 #define PC87417_XMEMBAH 0xf9
66 #define PC87417_XMEMBAL 0xfa
67 #define PC87417_XMEMSIZE 0xfb
68 #define PC87417_XIRQMAP1 0xfc
69 #define PC87417_XIRQMAP2 0xfd
70 #define PC87417_XBIMM 0xfe
71 #define PC87417_XBBSL 0xff
72 
73 #define PC87417_XBCNF 0x00
74 #define PC87417_XZCNF0 0x01
75 #define PC87417_XZCNF1 0x02
76 #define PC87417_XIRQC0 0x04
77 #define PC87417_XIRQC1 0x05
78 #define PC87417_XIRQC2 0x06
79 #define PC87417_XIMA0 0x08
80 #define PC87417_XIMA1 0x09
81 #define PC87417_XIMA2 0x0a
82 #define PC87417_XIMA3 0x0b
83 #define PC87417_XIMD 0x0c
84 #define PC87417_XZCNF2 0x0d
85 #define PC87417_XZCNF3 0x0e
86 #define PC87417_XZM0 0x0f
87 #define PC87417_XZM1 0x10
88 #define PC87417_XZM2 0x11
89 #define PC87417_XZM3 0x12
90 #define PC87417_HAP0 0x13
91 #define PC87417_HAP1 0x14
92 #define PC87417_XSCNF 0x15
93 #define PC87417_XWBCNF 0x16
94 
95 #include <device/pnp_type.h>
96 
99 
100 void xbus_cfg(pnp_devfn_t dev);
101 
102 #endif /* SUPERIO_NSC_PC87417_H */
void xbus_cfg(pnp_devfn_t dev)
Definition: early_init.c:21
void pc87417_enable_dev(pnp_devfn_t dev)
Definition: early_init.c:15
void pc87417_disable_dev(pnp_devfn_t dev)
Definition: early_init.c:9
u32 pnp_devfn_t
Definition: pnp_type.h:8