coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
onboard.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef ONBOARD_H
4 #define ONBOARD_H
5 
6 #include "irqroute.h"
7 
8 /*
9  * Calculation of gpio based irq.
10  * Gpio banks ordering : GPSW, GPNC, GPEC, GPSE
11  * Max direct irq (MAX_DIRECT_IRQ) is 114.
12  * Size of gpio banks are
13  * GPSW_SIZE = 98
14  * GPNC_SIZE = 73
15  * GPEC_SIZE = 27
16  * GPSE_SIZE = 86
17  */
18 
19 /*
20  * gpio based irq for kbd, 17th index in North Bank
21  * MAX_DIRECT_IRQ + GPSW_SIZE + 18
22  */
23 /* ToDo: change kbd irq to gpio bank index */
24 #define BOARD_I8042_IRQ 182
25 
26 #define BOARD_TOUCH_IRQ 184
27 
28 /* Audio: Gpio index in SW bank */
29 #define JACK_DETECT_GPIO_INDEX 95
30 /* SCI: Gpio index in N bank */
31 #define BOARD_SCI_GPIO_INDEX 15
32 
33 #define WP_GPIO GP_E_22
34 
35 /* Trackpad: Gpio index in N bank */
36 #define BOARD_TRACKPAD_GPIO_INDEX 18
37 
38 #define BOARD_TRACKPAD_NAME "trackpad"
39 #define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)
40 #define BOARD_TRACKPAD_I2C_BUS 5
41 #define BOARD_TRACKPAD_I2C_ADDR 0x15
42 
43 #define BOARD_TOUCHSCREEN_NAME "touchscreen"
44 #define BOARD_TOUCHSCREEN_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(2)
45 #define BOARD_TOUCHSCREEN_I2C_BUS 0
46 #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a /* TODO(shawnn): Check this */
47 
48 /* SD CARD gpio */
49 #define SDCARD_CD 81
50 
51 #define AUDIO_CODEC_HID "10EC5650"
52 #define AUDIO_CODEC_CID "10EC5650"
53 #define AUDIO_CODEC_DDN "RTEK Codec Controller "
54 #define AUDIO_CODEC_I2C_ADDR 0x1A
55 
56 #define BCRD2_PMIC_I2C_BUS 0x01
57 
58 #define DPTF_CPU_PASSIVE 88
59 #define DPTF_CPU_CRITICAL 90
60 
61 #endif