coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
southbridge/intel/lynxpoint/pch.h
>
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#include <
superio/ite/common/ite.h
>
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#include <
superio/ite/it8772f/it8772f.h
>
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#include "
onboard.h
"
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void
mainboard_config_superio
(
void
)
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{
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/* Early SuperIO setup */
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ite_kill_watchdog
(
IT8772F_GPIO_DEV
);
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it8772f_ac_resume_southbridge
(
IT8772F_SUPERIO_DEV
);
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ite_enable_serial
(
IT8772F_SERIAL_DEV
, CONFIG_TTYS0_BASE);
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/* Turn on Power LED */
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set_power_led
(
LED_ON
);
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}
IT8772F_GPIO_DEV
#define IT8772F_GPIO_DEV
Definition:
onboard.h:28
LED_ON
@ LED_ON
Definition:
onboard.h:38
set_power_led
void set_power_led(int state)
Definition:
led.c:6
IT8772F_SERIAL_DEV
#define IT8772F_SERIAL_DEV
Definition:
onboard.h:27
IT8772F_SUPERIO_DEV
#define IT8772F_SUPERIO_DEV
Definition:
onboard.h:29
it8772f.h
ite_enable_serial
void ite_enable_serial(pnp_devfn_t dev, u16 iobase)
Definition:
early_serial.c:61
ite_kill_watchdog
void ite_kill_watchdog(pnp_devfn_t dev)
Definition:
early_serial.c:129
ite.h
mainboard_config_superio
void mainboard_config_superio(void)
Definition:
bootblock.c:47
onboard.h
pch.h
it8772f_ac_resume_southbridge
void it8772f_ac_resume_southbridge(pnp_devfn_t dev)
Definition:
early_init.c:27
src
mainboard
google
beltino
bootblock.c
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