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gpio_soc_defs_pch_h.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _SOC_TIGERLAKE_GPIO_SOC_DEFS_PCH_H_H_
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#define _SOC_TIGERLAKE_GPIO_SOC_DEFS_PCH_H_H_
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/*
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* Most of the fixed numbers and macros are based on the GPP groups.
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* The GPIO groups are accessed through register blocks called
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* communities.
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* These values come from the FSP and match the PMC values for simplicity
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*/
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#define GPD 0x0
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#define GPP_A 0x1
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#define GPP_R 0x2
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#define GPP_B 0x3
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#define GPP_D 0x4
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#define GPP_C 0x5
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#define GPP_S 0x6
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#define GPP_G 0x7
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#define GPP_E 0x9
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#define GPP_F 0xA
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#define GPP_H 0xB
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#define GPP_J 0xC
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#define GPP_K 0xD
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#define GPP_I 0xE
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#define GPIO_MAX_NUM_PER_GROUP 26
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#define COMM_0 0
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#define COMM_1 1
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#define COMM_2 2
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#define COMM_3 3
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#define COMM_4 4
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#define COMM_5 5
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/*
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* GPIOs are ordered monotonically increasing to match ACPI/OS driver.
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* See tglh_pins in linux/drivers/pinctrl/intel/pinctrl-tigerlake.c
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*/
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/* Group A */
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#define GPP_SPI0_IO_2 0
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#define GPP_SPI0_IO_3 1
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#define GPP_SPI0_MOSI_IO_0 2
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#define GPP_SPI0_MISO_IO_1 3
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#define GPP_SPI0_TPM_CSB 4
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#define GPP_SPI0_FLASH_0_CSB 5
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#define GPP_SPI0_FLASH_1_CSB 6
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#define GPP_SPI0_CLK 7
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#define GPP_A0 8
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#define GPP_A1 9
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#define GPP_A2 10
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#define GPP_A3 11
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#define GPP_A4 12
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#define GPP_A5 13
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#define GPP_A6 14
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#define GPP_A7 15
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#define GPP_A8 16
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#define GPP_A9 17
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#define GPP_A10 18
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#define GPP_A11 19
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#define GPP_A12 20
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#define GPP_A13 21
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#define GPP_A14 22
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#define GPP_SPI0_CLK_LOOPBK 23
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#define GPP_ESPI_CLK_LOOPBK 24
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/* Group R */
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#define GPP_R0 25
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#define GPP_R1 26
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#define GPP_R2 27
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#define GPP_R3 28
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#define GPP_R4 29
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#define GPP_R5 30
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#define GPP_R6 31
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#define GPP_R7 32
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#define GPP_R8 33
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#define GPP_R9 34
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#define GPP_R10 35
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#define GPP_R11 36
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#define GPP_R12 37
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#define GPP_R13 38
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#define GPP_R14 39
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#define GPP_R15 40
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#define GPP_R16 41
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#define GPP_R17 42
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#define GPP_R18 43
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#define GPP_R19 44
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/* Group B */
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#define GPP_B0 45
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#define GPP_B1 46
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#define GPP_B2 47
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#define GPP_B3 48
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#define GPP_B4 49
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#define GPP_B5 50
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#define GPP_B6 51
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#define GPP_B7 52
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#define GPP_B8 53
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#define GPP_B9 54
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#define GPP_B10 55
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#define GPP_B11 56
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#define GPP_B12 57
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#define GPP_B13 58
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#define GPP_B14 59
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#define GPP_B15 60
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#define GPP_B16 61
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#define GPP_B17 62
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#define GPP_B18 63
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#define GPP_B19 64
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#define GPP_B20 65
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#define GPP_B21 66
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#define GPP_B22 67
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#define GPP_B23 68
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#define GPP_GSPI0_CLK_LOOPBK 69
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#define GPP_GSPI1_CLK_LOOPBK 70
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/* Group vGPIO_0 */
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#define ESPI_USB_OCB_0 71
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#define ESPI_USB_OCB_1 72
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#define ESPI_USB_OCB_2 73
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#define ESPI_USB_OCB_3 74
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#define USB_CPU_OCB_0 75
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#define USB_CPU_OCB_1 76
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#define USB_CPU_OCB_2 77
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#define USB_CPU_OCB_3 78
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#define GPIO_COM0_START GPP_SPI0_IO_2
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#define GPIO_COM0_END USB_CPU_OCB_3
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#define NUM_GPIO_COM0_PADS (GPIO_COM0_START - GPIO_COM0_END + 1)
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/* Group D */
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#define GPP_D0 79
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#define GPP_D1 80
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#define GPP_D2 81
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#define GPP_D3 82
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#define GPP_D4 83
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#define GPP_D5 84
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#define GPP_D6 85
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#define GPP_D7 86
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#define GPP_D8 87
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#define GPP_D9 88
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#define GPP_D10 89
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#define GPP_D11 90
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#define GPP_D12 91
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#define GPP_D13 92
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#define GPP_D14 93
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#define GPP_D15 94
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#define GPP_D16 95
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#define GPP_D17 96
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#define GPP_D18 97
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#define GPP_D19 98
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#define GPP_D20 99
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#define GPP_D21 100
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#define GPP_D22 101
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#define GPP_D23 102
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#define GPP_SPI1_CLK_LOOPBK 103
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#define GPP_GSPI3_CLK_LOOPBK 104
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/* Group C */
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#define GPP_C0 105
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#define GPP_C1 106
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#define GPP_C2 107
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#define GPP_C3 108
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#define GPP_C4 109
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#define GPP_C5 110
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#define GPP_C6 111
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#define GPP_C7 112
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#define GPP_C8 113
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#define GPP_C9 114
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#define GPP_C10 115
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#define GPP_C11 116
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#define GPP_C12 117
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#define GPP_C13 118
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#define GPP_C14 119
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#define GPP_C15 120
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#define GPP_C16 121
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#define GPP_C17 122
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#define GPP_C18 123
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#define GPP_C19 124
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#define GPP_C20 125
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#define GPP_C21 126
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#define GPP_C22 127
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#define GPP_C23 128
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/* Group S */
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#define GPP_S0 129
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#define GPP_S1 130
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#define GPP_S2 131
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#define GPP_S3 132
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#define GPP_S4 133
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#define GPP_S5 134
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#define GPP_S6 135
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#define GPP_S7 136
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/* Group G */
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#define GPP_G0 137
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#define GPP_G1 138
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#define GPP_G2 139
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#define GPP_G3 140
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#define GPP_G4 141
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#define GPP_G5 142
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#define GPP_G6 143
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#define GPP_G7 144
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#define GPP_G8 145
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#define GPP_G9 146
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#define GPP_G10 147
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#define GPP_G11 148
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#define GPP_G12 149
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#define GPP_G13 150
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#define GPP_G14 151
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#define GPP_G15 152
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#define GPP_GSPI2_CLK_LOOPBK 153
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/* Group vGPIO */
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#define CNV_BTEN 154
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#define CNV_BT_HOST_WAKEB 155
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#define CNV_BT_IF_SELECT 156
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#define vCNV_BT_UART_TXD 157
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#define vCNV_BT_UART_RXD 158
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#define vCNV_BT_UART_CTS_B 159
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#define vCNV_BT_UART_RTS_B 160
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#define vCNV_MFUART1_TXD 161
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#define vCNV_MFUART1_RXD 162
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#define vCNV_MFUART1_CTS_B 163
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#define vCNV_MFUART1_RTS_B 164
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#define vUART0_TXD 165
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#define vUART0_RXD 166
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#define vUART0_CTS_B 167
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#define vUART0_RTS_B 168
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#define vISH_UART0_TXD 169
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#define vISH_UART0_RXD 170
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#define vISH_UART0_CTS_B 171
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#define vISH_UART0_RTS_B 172
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#define vCNV_BT_I2S_BCLK 173
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#define vCNV_BT_I2S_WS_SYNC 174
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#define vCNV_BT_I2S_SDO 175
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#define vCNV_BT_I2S_SDI 176
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#define vI2S2_SCLK 177
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#define vI2S2_SFRM 178
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#define vI2S2_TXD 179
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#define vI2S2_RXD 180
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#define GPIO_COM1_START GPP_D0
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#define GPIO_COM1_END vI2S2_RXD
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#define NUM_GPIO_COM1_PADS (GPIO_COM1_END - GPIO_COM1_START + 1)
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/* Group E */
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#define GPP_E0 181
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#define GPP_E1 182
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#define GPP_E2 183
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#define GPP_E3 184
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#define GPP_E4 185
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#define GPP_E5 186
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#define GPP_E6 187
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#define GPP_E7 188
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#define GPP_E8 189
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#define GPP_E9 190
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#define GPP_E10 191
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#define GPP_E11 192
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#define GPP_E12 193
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/* Group F */
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#define GPP_F0 194
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#define GPP_F1 195
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#define GPP_F2 196
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#define GPP_F3 197
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#define GPP_F4 198
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#define GPP_F5 199
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#define GPP_F6 200
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#define GPP_F7 201
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#define GPP_F8 202
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#define GPP_F9 203
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#define GPP_F10 204
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#define GPP_F11 205
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#define GPP_F12 206
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#define GPP_F13 207
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#define GPP_F14 208
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#define GPP_F15 209
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#define GPP_F16 210
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#define GPP_F17 211
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#define GPP_F18 212
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#define GPP_F19 213
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#define GPP_F20 214
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#define GPP_F21 215
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#define GPP_F22 216
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#define GPP_F23 217
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#define GPIO_COM3_START GPP_E0
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#define GPIO_COM3_END GPP_F23
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#define NUM_GPIO_COM3_PADS (GPIO_COM3_END - GPIO_COM3_START + 1)
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/* Group H */
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#define GPP_H0 218
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#define GPP_H1 219
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#define GPP_H2 220
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#define GPP_H3 221
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#define GPP_H4 222
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#define GPP_H5 223
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#define GPP_H6 224
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#define GPP_H7 225
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#define GPP_H8 226
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#define GPP_H9 227
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#define GPP_H10 228
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#define GPP_H11 229
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#define GPP_H12 230
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#define GPP_H13 231
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#define GPP_H14 232
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#define GPP_H15 233
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#define GPP_H16 234
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#define GPP_H17 235
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#define GPP_H18 236
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#define GPP_H19 237
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#define GPP_H20 238
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#define GPP_H21 239
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#define GPP_H22 240
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#define GPP_H23 241
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/* Group J */
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#define GPP_J0 242
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#define GPP_J1 243
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#define GPP_J2 244
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#define GPP_J3 245
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#define GPP_J4 246
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#define GPP_J5 247
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#define GPP_J6 248
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#define GPP_J7 249
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#define GPP_J8 250
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#define GPP_J9 251
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/* Group K */
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#define GPP_K0 252
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#define GPP_K1 253
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#define GPP_K2 254
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#define GPP_K3 255
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#define GPP_K4 256
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#define GPP_K5 257
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#define GPP_K6 258
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#define GPP_K7 259
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#define GPP_K8 260
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#define GPP_K9 261
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#define GPP_K10 262
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#define GPP_K11 263
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#define GPP_SYS_PWROK 264
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#define GPP_SYS_RESETB 265
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#define GPP_MLK_RSTB 266
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#define GPIO_COM4_START GPP_H0
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#define GPIO_COM4_END GPP_MLK_RSTB
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#define NUM_GPIO_COM4_PADS (GPIO_COM4_END - GPIO_COM4_START + 1)
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/* Group I */
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#define GPP_I0 267
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#define GPP_I1 268
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#define GPP_I2 269
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#define GPP_I3 270
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#define GPP_I4 271
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#define GPP_I5 272
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#define GPP_I6 273
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#define GPP_I7 274
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#define GPP_I8 275
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#define GPP_I9 276
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#define GPP_I10 277
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#define GPP_I11 278
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#define GPP_I12 279
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#define GPP_I13 280
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#define GPP_I14 281
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/* Group JTAG */
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#define GPP_JTAG_TDO 282
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#define GPP_JTAG_X 283
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#define GPP_JTAG_PRDYB 284
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#define GPP_JTAG_PREQB 285
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#define GPP_JTAG_TDI 286
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#define GPP_JTAG_TMS 287
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#define GPP_JTAG_TCK 288
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#define GPP_JTAG_PMODE 289
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#define GPP_JTAG_CPU_TRSTB 290
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#define GPIO_COM5_START GPP_I0
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#define GPIO_COM5_END GPP_JTAG_CPU_TRSTB
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#define NUM_GPIO_COM5_PADS (GPIO_COM5_END - GPIO_COM5_START + 1)
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/* Group GPD */
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#define GPD0 291
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#define GPD1 292
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#define GPD2 293
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#define GPD3 294
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#define GPD4 295
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#define GPD5 296
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#define GPD6 297
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#define GPD7 298
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#define GPD8 299
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#define GPD9 300
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#define GPD10 301
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#define GPD11 302
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#define GPD12 303
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#define GPIO_COM2_START GPD0
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#define GPIO_COM2_END GPD12
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#define NUM_GPIO_COM2_PADS (GPIO_COM2_END - GPIO_COM2_START + 1)
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#define TOTAL_GPIO_COMM (COMM_5 + 1)
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#define TOTAL_PADS 304
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#endif
src
soc
intel
tigerlake
include
soc
gpio_soc_defs_pch_h.h
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