coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio_soc_defs_pch_h.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _SOC_TIGERLAKE_GPIO_SOC_DEFS_PCH_H_H_
4 #define _SOC_TIGERLAKE_GPIO_SOC_DEFS_PCH_H_H_
5 
6 /*
7  * Most of the fixed numbers and macros are based on the GPP groups.
8  * The GPIO groups are accessed through register blocks called
9  * communities.
10  * These values come from the FSP and match the PMC values for simplicity
11  */
12 #define GPD 0x0
13 #define GPP_A 0x1
14 #define GPP_R 0x2
15 #define GPP_B 0x3
16 #define GPP_D 0x4
17 #define GPP_C 0x5
18 #define GPP_S 0x6
19 #define GPP_G 0x7
20 #define GPP_E 0x9
21 #define GPP_F 0xA
22 #define GPP_H 0xB
23 #define GPP_J 0xC
24 #define GPP_K 0xD
25 #define GPP_I 0xE
26 
27 #define GPIO_MAX_NUM_PER_GROUP 26
28 
29 #define COMM_0 0
30 #define COMM_1 1
31 #define COMM_2 2
32 #define COMM_3 3
33 #define COMM_4 4
34 #define COMM_5 5
35 
36 /*
37  * GPIOs are ordered monotonically increasing to match ACPI/OS driver.
38  * See tglh_pins in linux/drivers/pinctrl/intel/pinctrl-tigerlake.c
39  */
40 /* Group A */
41 #define GPP_SPI0_IO_2 0
42 #define GPP_SPI0_IO_3 1
43 #define GPP_SPI0_MOSI_IO_0 2
44 #define GPP_SPI0_MISO_IO_1 3
45 #define GPP_SPI0_TPM_CSB 4
46 #define GPP_SPI0_FLASH_0_CSB 5
47 #define GPP_SPI0_FLASH_1_CSB 6
48 #define GPP_SPI0_CLK 7
49 #define GPP_A0 8
50 #define GPP_A1 9
51 #define GPP_A2 10
52 #define GPP_A3 11
53 #define GPP_A4 12
54 #define GPP_A5 13
55 #define GPP_A6 14
56 #define GPP_A7 15
57 #define GPP_A8 16
58 #define GPP_A9 17
59 #define GPP_A10 18
60 #define GPP_A11 19
61 #define GPP_A12 20
62 #define GPP_A13 21
63 #define GPP_A14 22
64 #define GPP_SPI0_CLK_LOOPBK 23
65 #define GPP_ESPI_CLK_LOOPBK 24
66 
67 /* Group R */
68 #define GPP_R0 25
69 #define GPP_R1 26
70 #define GPP_R2 27
71 #define GPP_R3 28
72 #define GPP_R4 29
73 #define GPP_R5 30
74 #define GPP_R6 31
75 #define GPP_R7 32
76 #define GPP_R8 33
77 #define GPP_R9 34
78 #define GPP_R10 35
79 #define GPP_R11 36
80 #define GPP_R12 37
81 #define GPP_R13 38
82 #define GPP_R14 39
83 #define GPP_R15 40
84 #define GPP_R16 41
85 #define GPP_R17 42
86 #define GPP_R18 43
87 #define GPP_R19 44
88 
89 /* Group B */
90 #define GPP_B0 45
91 #define GPP_B1 46
92 #define GPP_B2 47
93 #define GPP_B3 48
94 #define GPP_B4 49
95 #define GPP_B5 50
96 #define GPP_B6 51
97 #define GPP_B7 52
98 #define GPP_B8 53
99 #define GPP_B9 54
100 #define GPP_B10 55
101 #define GPP_B11 56
102 #define GPP_B12 57
103 #define GPP_B13 58
104 #define GPP_B14 59
105 #define GPP_B15 60
106 #define GPP_B16 61
107 #define GPP_B17 62
108 #define GPP_B18 63
109 #define GPP_B19 64
110 #define GPP_B20 65
111 #define GPP_B21 66
112 #define GPP_B22 67
113 #define GPP_B23 68
114 #define GPP_GSPI0_CLK_LOOPBK 69
115 #define GPP_GSPI1_CLK_LOOPBK 70
116 
117 /* Group vGPIO_0 */
118 #define ESPI_USB_OCB_0 71
119 #define ESPI_USB_OCB_1 72
120 #define ESPI_USB_OCB_2 73
121 #define ESPI_USB_OCB_3 74
122 #define USB_CPU_OCB_0 75
123 #define USB_CPU_OCB_1 76
124 #define USB_CPU_OCB_2 77
125 #define USB_CPU_OCB_3 78
126 
127 
128 #define GPIO_COM0_START GPP_SPI0_IO_2
129 #define GPIO_COM0_END USB_CPU_OCB_3
130 #define NUM_GPIO_COM0_PADS (GPIO_COM0_START - GPIO_COM0_END + 1)
131 
132 /* Group D */
133 #define GPP_D0 79
134 #define GPP_D1 80
135 #define GPP_D2 81
136 #define GPP_D3 82
137 #define GPP_D4 83
138 #define GPP_D5 84
139 #define GPP_D6 85
140 #define GPP_D7 86
141 #define GPP_D8 87
142 #define GPP_D9 88
143 #define GPP_D10 89
144 #define GPP_D11 90
145 #define GPP_D12 91
146 #define GPP_D13 92
147 #define GPP_D14 93
148 #define GPP_D15 94
149 #define GPP_D16 95
150 #define GPP_D17 96
151 #define GPP_D18 97
152 #define GPP_D19 98
153 #define GPP_D20 99
154 #define GPP_D21 100
155 #define GPP_D22 101
156 #define GPP_D23 102
157 #define GPP_SPI1_CLK_LOOPBK 103
158 #define GPP_GSPI3_CLK_LOOPBK 104
159 
160 /* Group C */
161 #define GPP_C0 105
162 #define GPP_C1 106
163 #define GPP_C2 107
164 #define GPP_C3 108
165 #define GPP_C4 109
166 #define GPP_C5 110
167 #define GPP_C6 111
168 #define GPP_C7 112
169 #define GPP_C8 113
170 #define GPP_C9 114
171 #define GPP_C10 115
172 #define GPP_C11 116
173 #define GPP_C12 117
174 #define GPP_C13 118
175 #define GPP_C14 119
176 #define GPP_C15 120
177 #define GPP_C16 121
178 #define GPP_C17 122
179 #define GPP_C18 123
180 #define GPP_C19 124
181 #define GPP_C20 125
182 #define GPP_C21 126
183 #define GPP_C22 127
184 #define GPP_C23 128
185 
186 /* Group S */
187 #define GPP_S0 129
188 #define GPP_S1 130
189 #define GPP_S2 131
190 #define GPP_S3 132
191 #define GPP_S4 133
192 #define GPP_S5 134
193 #define GPP_S6 135
194 #define GPP_S7 136
195 
196 /* Group G */
197 #define GPP_G0 137
198 #define GPP_G1 138
199 #define GPP_G2 139
200 #define GPP_G3 140
201 #define GPP_G4 141
202 #define GPP_G5 142
203 #define GPP_G6 143
204 #define GPP_G7 144
205 #define GPP_G8 145
206 #define GPP_G9 146
207 #define GPP_G10 147
208 #define GPP_G11 148
209 #define GPP_G12 149
210 #define GPP_G13 150
211 #define GPP_G14 151
212 #define GPP_G15 152
213 #define GPP_GSPI2_CLK_LOOPBK 153
214 
215 /* Group vGPIO */
216 #define CNV_BTEN 154
217 #define CNV_BT_HOST_WAKEB 155
218 #define CNV_BT_IF_SELECT 156
219 #define vCNV_BT_UART_TXD 157
220 #define vCNV_BT_UART_RXD 158
221 #define vCNV_BT_UART_CTS_B 159
222 #define vCNV_BT_UART_RTS_B 160
223 #define vCNV_MFUART1_TXD 161
224 #define vCNV_MFUART1_RXD 162
225 #define vCNV_MFUART1_CTS_B 163
226 #define vCNV_MFUART1_RTS_B 164
227 #define vUART0_TXD 165
228 #define vUART0_RXD 166
229 #define vUART0_CTS_B 167
230 #define vUART0_RTS_B 168
231 #define vISH_UART0_TXD 169
232 #define vISH_UART0_RXD 170
233 #define vISH_UART0_CTS_B 171
234 #define vISH_UART0_RTS_B 172
235 #define vCNV_BT_I2S_BCLK 173
236 #define vCNV_BT_I2S_WS_SYNC 174
237 #define vCNV_BT_I2S_SDO 175
238 #define vCNV_BT_I2S_SDI 176
239 #define vI2S2_SCLK 177
240 #define vI2S2_SFRM 178
241 #define vI2S2_TXD 179
242 #define vI2S2_RXD 180
243 
244 #define GPIO_COM1_START GPP_D0
245 #define GPIO_COM1_END vI2S2_RXD
246 #define NUM_GPIO_COM1_PADS (GPIO_COM1_END - GPIO_COM1_START + 1)
247 
248 /* Group E */
249 #define GPP_E0 181
250 #define GPP_E1 182
251 #define GPP_E2 183
252 #define GPP_E3 184
253 #define GPP_E4 185
254 #define GPP_E5 186
255 #define GPP_E6 187
256 #define GPP_E7 188
257 #define GPP_E8 189
258 #define GPP_E9 190
259 #define GPP_E10 191
260 #define GPP_E11 192
261 #define GPP_E12 193
262 
263 /* Group F */
264 #define GPP_F0 194
265 #define GPP_F1 195
266 #define GPP_F2 196
267 #define GPP_F3 197
268 #define GPP_F4 198
269 #define GPP_F5 199
270 #define GPP_F6 200
271 #define GPP_F7 201
272 #define GPP_F8 202
273 #define GPP_F9 203
274 #define GPP_F10 204
275 #define GPP_F11 205
276 #define GPP_F12 206
277 #define GPP_F13 207
278 #define GPP_F14 208
279 #define GPP_F15 209
280 #define GPP_F16 210
281 #define GPP_F17 211
282 #define GPP_F18 212
283 #define GPP_F19 213
284 #define GPP_F20 214
285 #define GPP_F21 215
286 #define GPP_F22 216
287 #define GPP_F23 217
288 
289 #define GPIO_COM3_START GPP_E0
290 #define GPIO_COM3_END GPP_F23
291 #define NUM_GPIO_COM3_PADS (GPIO_COM3_END - GPIO_COM3_START + 1)
292 
293 /* Group H */
294 #define GPP_H0 218
295 #define GPP_H1 219
296 #define GPP_H2 220
297 #define GPP_H3 221
298 #define GPP_H4 222
299 #define GPP_H5 223
300 #define GPP_H6 224
301 #define GPP_H7 225
302 #define GPP_H8 226
303 #define GPP_H9 227
304 #define GPP_H10 228
305 #define GPP_H11 229
306 #define GPP_H12 230
307 #define GPP_H13 231
308 #define GPP_H14 232
309 #define GPP_H15 233
310 #define GPP_H16 234
311 #define GPP_H17 235
312 #define GPP_H18 236
313 #define GPP_H19 237
314 #define GPP_H20 238
315 #define GPP_H21 239
316 #define GPP_H22 240
317 #define GPP_H23 241
318 
319 /* Group J */
320 #define GPP_J0 242
321 #define GPP_J1 243
322 #define GPP_J2 244
323 #define GPP_J3 245
324 #define GPP_J4 246
325 #define GPP_J5 247
326 #define GPP_J6 248
327 #define GPP_J7 249
328 #define GPP_J8 250
329 #define GPP_J9 251
330 
331 /* Group K */
332 #define GPP_K0 252
333 #define GPP_K1 253
334 #define GPP_K2 254
335 #define GPP_K3 255
336 #define GPP_K4 256
337 #define GPP_K5 257
338 #define GPP_K6 258
339 #define GPP_K7 259
340 #define GPP_K8 260
341 #define GPP_K9 261
342 #define GPP_K10 262
343 #define GPP_K11 263
344 #define GPP_SYS_PWROK 264
345 #define GPP_SYS_RESETB 265
346 #define GPP_MLK_RSTB 266
347 
348 #define GPIO_COM4_START GPP_H0
349 #define GPIO_COM4_END GPP_MLK_RSTB
350 #define NUM_GPIO_COM4_PADS (GPIO_COM4_END - GPIO_COM4_START + 1)
351 
352 /* Group I */
353 #define GPP_I0 267
354 #define GPP_I1 268
355 #define GPP_I2 269
356 #define GPP_I3 270
357 #define GPP_I4 271
358 #define GPP_I5 272
359 #define GPP_I6 273
360 #define GPP_I7 274
361 #define GPP_I8 275
362 #define GPP_I9 276
363 #define GPP_I10 277
364 #define GPP_I11 278
365 #define GPP_I12 279
366 #define GPP_I13 280
367 #define GPP_I14 281
368 
369 /* Group JTAG */
370 #define GPP_JTAG_TDO 282
371 #define GPP_JTAG_X 283
372 #define GPP_JTAG_PRDYB 284
373 #define GPP_JTAG_PREQB 285
374 #define GPP_JTAG_TDI 286
375 #define GPP_JTAG_TMS 287
376 #define GPP_JTAG_TCK 288
377 #define GPP_JTAG_PMODE 289
378 #define GPP_JTAG_CPU_TRSTB 290
379 
380 #define GPIO_COM5_START GPP_I0
381 #define GPIO_COM5_END GPP_JTAG_CPU_TRSTB
382 #define NUM_GPIO_COM5_PADS (GPIO_COM5_END - GPIO_COM5_START + 1)
383 
384 /* Group GPD */
385 #define GPD0 291
386 #define GPD1 292
387 #define GPD2 293
388 #define GPD3 294
389 #define GPD4 295
390 #define GPD5 296
391 #define GPD6 297
392 #define GPD7 298
393 #define GPD8 299
394 #define GPD9 300
395 #define GPD10 301
396 #define GPD11 302
397 #define GPD12 303
398 
399 #define GPIO_COM2_START GPD0
400 #define GPIO_COM2_END GPD12
401 #define NUM_GPIO_COM2_PADS (GPIO_COM2_END - GPIO_COM2_START + 1)
402 
403 #define TOTAL_GPIO_COMM (COMM_5 + 1)
404 #define TOTAL_PADS 304
405 
406 #endif