coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _INTEL_COMMON_RAMSTAGE_H_
4 #define _INTEL_COMMON_RAMSTAGE_H_
5 
6 #include <fsp/util.h>
7 #include <stdint.h>
8 
9 /* Perform Intel silicon init. */
10 void intel_silicon_init(void);
11 /* Initialize UPD data before SiliconInit call. */
12 void soc_silicon_init_params(SILICON_INIT_UPD *params);
13 void mainboard_silicon_init_params(SILICON_INIT_UPD *params);
14 void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
15  SILICON_INIT_UPD *new);
16 void load_vbt(SILICON_INIT_UPD *params);
17 
18 #endif /* _INTEL_COMMON_RAMSTAGE_H_ */
params
static struct sdram_info params
Definition: sdram_configs.c:83
soc_silicon_init_params
void soc_silicon_init_params(SILICON_INIT_UPD *params)
Definition: chip.c:47
load_vbt
void load_vbt(SILICON_INIT_UPD *params)
Definition: vbt.c:12
soc_display_silicon_init_params
void soc_display_silicon_init_params(const SILICON_INIT_UPD *old, SILICON_INIT_UPD *new)
Definition: chip.c:139
intel_silicon_init
void intel_silicon_init(void)
Definition: ramstage.c:155
mainboard_silicon_init_params
void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
Definition: ramstage.c:162