coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
psp_verstage_addr.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* TODO: Check if this is still correct */
4 
5 #ifndef AMD_SABRINA_PSP_VERSTAGE_ADDR_H
6 #define AMD_SABRINA_PSP_VERSTAGE_ADDR_H
7 
8 /*
9  * Start of available space is 0x0 and this is where the
10  * header for the user app (verstage) must be mapped.
11  * Size is 208KB
12  */
13 #define PSP_SRAM_START 0x0
14 #define PSP_SRAM_SIZE (208K)
15 #define VERSTAGE_START PSP_SRAM_START
16 
17 /*
18  * The top of the stack must be 4k aligned, so set the bottom as 4k aligned
19  * and make the size a multiple of 4k
20  */
21 
22 #define PSP_VERSTAGE_STACK_START 0x2a000
23 #define PSP_VERSTAGE_STACK_SIZE (40K)
24 
25 #endif /* AMD_SABRINA_PSP_VERSTAGE_ADDR_H */