coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
variant.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <baseboard/variants.h>
4 #include <chip.h>
5 #include <soc/pci_devs.h>
7 
9 {
11  struct device *emmc_host;
12  struct device *ssd_host;
13  config_t *cfg = config_of_soc();
16 
17  /* SKU ID 2 and 4 do not have eMMC, hence disable it. */
19  if ((sku_id == 2) || (sku_id == 4)) {
20  if (emmc_host == NULL)
21  return;
22  emmc_host->enabled = 0;
23  cfg->ScsEmmcHs400Enabled = 0;
24  }
25 
26  /* SKU ID 1 and 3 do not have SSD, hence disable it. */
27  if ((sku_id == 1) || (sku_id == 3)) {
28  if (ssd_host == NULL)
29  return;
30  ssd_host->enabled = 0;
31  cfg->SataSalpSupport = 0;
32  cfg->SataPortsEnable[1] = 0;
33  cfg->SataPortsDevSlp[1] = 0;
34  cfg->satapwroptimize = 0;
35  }
36 }
uint32_t sku_id(void)
DEVTREE_CONST struct device * pcidev_path_on_root(pci_devfn_t devfn)
Definition: device_const.c:255
uint32_t google_chromeec_get_board_sku(void)
Definition: ec_skuid.c:6
void variant_devtree_update(void)
Definition: variant.c:53
#define config_of_soc()
Definition: device.h:394
#define PCH_DEVFN_SATA
Definition: pci_devs.h:158
#define PCH_DEVFN_EMMC
Definition: pci_devs.h:148
#define NULL
Definition: stddef.h:19
unsigned int uint32_t
Definition: stdint.h:14
Definition: device.h:107
unsigned int enabled
Definition: device.h:122