coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
buildOpts.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <vendorcode/amd/agesa/f16kb/AGESA.h>
4 
5 /* Include the files that instantiate the configuration definitions. */
6 #include <vendorcode/amd/agesa/f16kb/Include/AdvancedApi.h>
7 #include <vendorcode/amd/agesa/f16kb/Include/GnbInterface.h>
8 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.h>
9 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h>
10 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/Family/cpuFamRegisters.h>
11 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuFeatures.h>
12 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h>
13 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/heapManager.h>
14 /* AGESA nonsense: the next three headers depend on heapManager.h */
15 #include <vendorcode/amd/agesa/f16kb/Proc/Common/CreateStruct.h>
16 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h>
17 #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.h>
18 
19 /* Select the CPU family */
20 #define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
21 
22 /* Select the CPU socket type */
23 #define INSTALL_FT3_SOCKET_SUPPORT TRUE
24 
25 //#define BLDOPT_REMOVE_UDIMMS_SUPPORT TRUE
26 //#define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE
27 //#define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE
28 #define BLDOPT_REMOVE_ECC_SUPPORT TRUE
29 //#define BLDOPT_REMOVE_SRAT FALSE
30 #define BLDOPT_REMOVE_WHEA FALSE
31 #define BLDOPT_REMOVE_CRAT TRUE
32 #define BLDOPT_REMOVE_CDIT TRUE
33 
34 /* Build configuration values here. */
35 #define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_DESKTOP
36 
37 #define BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT DDR1600_FREQUENCY
38 #define BLDCFG_MEMORY_RDIMM_CAPABLE TRUE
39 #define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE
40 #define BLDCFG_MEMORY_SODIMM_CAPABLE FALSE
41 #define BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING FALSE
42 #define BLDCFG_MEMORY_CHANNEL_INTERLEAVING FALSE
43 #define BLDCFG_MEMORY_CLOCK_SELECT DDR1600_FREQUENCY
44 #define BLDCFG_IGNORE_SPD_CHECKSUM TRUE
45 #define BLDCFG_ENABLE_ECC_FEATURE FALSE
46 #define BLDCFG_ECC_SYNC_FLOOD FALSE
47 
48 /*
49  * Specify the default values for the VRM controlling the VDDNB plane.
50  * If not specified, the values used for the core VRM will be applied
51  */
52 #define BLDCFG_VRM_NB_LOW_POWER_THRESHOLD 0
53 
54 #define BLDCFG_IOMMU_SUPPORT FALSE
55 
56 #define BLDCFG_CFG_GNB_HD_AUDIO TRUE
57 
58 /* AGESA nonsense: this header depends on the definitions above */
59 #include <PlatformInstall.h>