coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <pc80/keyboard.h>
6 #include <superio/conf_mode.h>
8 
9 #include "chip.h"
10 #include "it8623e.h"
11 
12 static void it8623e_init(struct device *dev)
13 {
14  const struct superio_ite_it8623e_config *conf = dev->chip_info;
15  const struct resource *res;
16 
17  if (!dev->enabled)
18  return;
19 
20  switch (dev->path.pnp.device) {
21  case IT8623E_EC:
22  res = probe_resource(dev, PNP_IDX_IO0);
23  if (!conf || !res)
24  break;
25  ite_ec_init(res->base, &conf->ec);
26  break;
27  case IT8623E_KBCK:
29  break;
30  case IT8623E_KBCM:
31  break;
32  }
33 }
34 
35 static struct device_operations ops = {
37  .set_resources = pnp_set_resources,
38  .enable_resources = pnp_enable_resources,
39  .enable = pnp_alt_enable,
40  .init = it8623e_init,
41  .ops_pnp_mode = &pnp_conf_mode_870155_aa,
42 };
43 
44 static struct pnp_info pnp_dev_info[] = {
45  { NULL, IT8623E_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
46  { NULL, IT8623E_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
47  { NULL, IT8623E_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
49  0x0ff8, 0x0ff8, },
50  { NULL, IT8623E_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ff0, 0x0ff0, },
51  { NULL, IT8623E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0fff, 0x0fff, },
52  { NULL, IT8623E_KBCM, PNP_IRQ0, },
54  0x0fff, 0x0fe0, 0x0fff, },
55 };
56 
57 static void enable_dev(struct device *dev)
58 {
60 }
61 
63  CHIP_NAME("ITE IT8623E Super I/O")
64  .enable_dev = enable_dev,
65 };
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pnp_mode_ops pnp_conf_mode_870155_aa
Definition: conf_mode.c:229
struct resource * probe_resource(const struct device *dev, unsigned int index)
See if a resource structure already exists for a given index.
Definition: device_util.c:323
void ite_ec_init(const u16 base, const struct ite_ec_config *const conf)
Definition: env_ctrl.c:274
#define CHIP_NAME(X)
Definition: device.h:32
#define IT8623E_SP2
Definition: it8623e.h:10
#define IT8623E_PP
Definition: it8623e.h:11
#define IT8623E_KBCK
Definition: it8623e.h:13
#define IT8623E_KBCM
Definition: it8623e.h:14
#define IT8623E_SP1
Definition: it8623e.h:9
#define IT8623E_GPIO
Definition: it8623e.h:15
#define IT8623E_EC
Definition: it8623e.h:12
#define IT8623E_FDC
Definition: it8623e.h:8
static void enable_dev(struct device *dev)
Definition: superio.c:57
static struct device_operations ops
Definition: superio.c:35
struct chip_operations superio_ite_it8623e_ops
Definition: superio.c:62
static struct pnp_info pnp_dev_info[]
Definition: superio.c:44
static void it8623e_init(struct device *dev)
Definition: superio.c:12
uint8_t pc_keyboard_init(uint8_t probe_aux)
Definition: keyboard.c:229
#define NO_AUX_DEVICE
Definition: keyboard.h:6
#define PNP_DRQ0
Definition: pnp.h:49
#define PNP_IO1
Definition: pnp.h:43
#define PNP_IO2
Definition: pnp.h:44
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
#define PNP_IDX_IO0
Definition: pnp_def.h:5
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info)
Definition: pnp_device.c:371
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
#define NULL
Definition: stddef.h:19
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pnp_path pnp
Definition: path.h:117
Definition: device.h:107
struct device_path path
Definition: device.h:115
DEVTREE_CONST void * chip_info
Definition: device.h:164
unsigned int enabled
Definition: device.h:122
Definition: pnp.h:37
unsigned int device
Definition: path.h:59
resource_t base
Definition: resource.h:45
struct ite_ec_config ec
Definition: chip.h:9