coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_init.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <gpio.h>
4 #include <soc/mt8183.h>
5 #include <soc/spi.h>
6 
7 #include "early_init.h"
8 #include "gpio.h"
9 
10 #define BOOTBLOCK_EN_L (GPIO(KPROW0))
11 #define AP_IN_SLEEP_L (GPIO(SRCLKENA0))
12 
14 {
16 
17  /* Turn on real eMMC and allow communication to EC. */
19 
21 
22  gpio_set_mode(AP_IN_SLEEP_L, PAD_SRCLKENA0_FUNC_SRCLKENA0);
23 
24  mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0);
26 }
#define MHz
Definition: helpers.h:80
void setup_chromeos_gpios(void)
Definition: chromeos.c:10
void gpio_output(gpio_t gpio, int value)
Definition: gpio.c:194
#define AP_IN_SLEEP_L
Definition: early_init.c:11
void mainboard_early_init(void)
Definition: early_init.c:13
#define BOOTBLOCK_EN_L
Definition: early_init.c:10
#define CR50_IRQ
Definition: gpio.h:11
@ IRQ_TYPE_EDGE_RISING
Definition: gpio_common.h:55
void mt8183_early_init(void)
Definition: mt8183.c:7
void gpio_set_mode(gpio_t gpio, int mode)
Definition: gpio.c:45
void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
Definition: gpio.c:142
@ SPI_PAD0_MASK
Definition: spi_common.h:46
void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, unsigned int speed_hz, unsigned int tick_dly)
Definition: spi.c:56