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acpi_pirq_gen.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef INTEL_COMMON_ACPI_PIRQ_GEN_H
4 #define INTEL_COMMON_ACPI_PIRQ_GEN_H
5 
6 #include <assert.h>
7 #include <device/device.h>
8 
9 #define MAX_SLOTS 32
10 
11 enum pci_pin {
18 };
19 
20 enum pirq {
31 };
32 
33 static inline size_t pirq_idx(enum pirq pirq)
34 {
36  return (size_t)(pirq - PIRQ_A);
37 }
38 
39 /*
40  * This struct represents an assignment of slot/pin -> IRQ. Some chipsets may
41  * want to provide both PIC-mode and APIC-mode IRQs (e.g. selected using PICM
42  * set by the OS), therefore a field for each of a PIRQ for PIC-mode and a
43  * GSI for APIC-mode are provided.
44  *
45  * For APIC mode, only GSIs are supported (`acpi_gsi`).
46  *
47  * For PIC mode, if the pirq_map_type is PIRQ_GSI, then `pic_pirq` is used as an
48  * index into `struct pic_pirq_map.gsi`, or for SOURCE_PATH, `pic_pirq` indexes
49  * into `struct pic_pirq_map.source_path` to pick the path to the LNKx device.
50  *
51  * The reasoning for this structure is related to older vs. newer Intel
52  * platforms; older platforms supported routing of PCI IRQs to a PIRQ
53  * only. Newer platforms support routing IRQs to either a PIRQ or (for some PCI
54  * devices) a non-PIRQ GSI.
55  */
57  unsigned int slot;
58  enum pci_pin pin;
59  /* PIRQ # for PIC mode */
60  unsigned int pic_pirq;
61  /* GSI # for APIC mode */
62  unsigned int apic_gsi;
63 };
64 
68 };
69 
70 /*
71  * A PIRQ can be either be statically assigned a GSI or OSPM can use the Methods
72  * on the ACPI device (source_path) to assign IRQs at runtime.
73  */
74 struct pic_pirq_map {
75  enum pirq_map_type type;
76  union {
77  unsigned int gsi[PIRQ_COUNT];
79  };
80 };
81 
82 /*
83  * Generate an ACPI _PRT table by providing PIRQ and/or GSI information for each
84  * slot/pin combination, and optionally providing paths to LNKx devices that can
85  * provide IRQs in PIC mode.
86  */
87 void intel_write_pci0_PRT(const struct slot_pin_irq_map *pin_irq_map,
88  unsigned int map_count,
89  const struct pic_pirq_map *pirq_map);
90 
91 bool is_slot_pin_assigned(const struct slot_pin_irq_map *pin_irq_map,
92  unsigned int map_count, unsigned int slot, unsigned int pin);
93 
94 #endif
bool is_slot_pin_assigned(const struct slot_pin_irq_map *pin_irq_map, unsigned int map_count, unsigned int slot, unsigned int pin)
void intel_write_pci0_PRT(const struct slot_pin_irq_map *pin_irq_map, unsigned int map_count, const struct pic_pirq_map *pirq_map)
Definition: acpi_pirq_gen.c:46
pirq
Definition: acpi_pirq_gen.h:20
@ PIRQ_A
Definition: acpi_pirq_gen.h:22
@ PIRQ_C
Definition: acpi_pirq_gen.h:24
@ PIRQ_G
Definition: acpi_pirq_gen.h:28
@ PIRQ_H
Definition: acpi_pirq_gen.h:29
@ PIRQ_E
Definition: acpi_pirq_gen.h:26
@ PIRQ_D
Definition: acpi_pirq_gen.h:25
@ PIRQ_INVALID
Definition: acpi_pirq_gen.h:21
@ PIRQ_COUNT
Definition: acpi_pirq_gen.h:30
@ PIRQ_F
Definition: acpi_pirq_gen.h:27
@ PIRQ_B
Definition: acpi_pirq_gen.h:23
pirq_map_type
Definition: acpi_pirq_gen.h:65
@ PIRQ_SOURCE_PATH
Definition: acpi_pirq_gen.h:67
@ PIRQ_GSI
Definition: acpi_pirq_gen.h:66
static size_t pirq_idx(enum pirq pirq)
Definition: acpi_pirq_gen.h:33
pci_pin
Definition: acpi_pirq_gen.h:11
@ PCI_INT_D
Definition: acpi_pirq_gen.h:16
@ PCI_INT_NONE
Definition: acpi_pirq_gen.h:12
@ PCI_INT_B
Definition: acpi_pirq_gen.h:14
@ PCI_INT_MAX
Definition: acpi_pirq_gen.h:17
@ PCI_INT_A
Definition: acpi_pirq_gen.h:13
@ PCI_INT_C
Definition: acpi_pirq_gen.h:15
#define assert(statement)
Definition: assert.h:74
#define DEVICE_PATH_MAX
Definition: path.h:133
enum pirq_map_type type
Definition: acpi_pirq_gen.h:75
char source_path[PIRQ_COUNT][DEVICE_PATH_MAX]
Definition: acpi_pirq_gen.h:78
unsigned int gsi[PIRQ_COUNT]
Definition: acpi_pirq_gen.h:77
unsigned int apic_gsi
Definition: acpi_pirq_gen.h:62
unsigned int slot
Definition: acpi_pirq_gen.h:57
unsigned int pic_pirq
Definition: acpi_pirq_gen.h:60
enum pci_pin pin
Definition: acpi_pirq_gen.h:58