coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spd.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
mainboard/google/auron/variant.h
>
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#include <
soc/pei_data.h
>
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#include <soc/pei_wrapper.h>
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/* Copy SPD data for on-board memory */
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void
mainboard_fill_spd_data
(
struct
pei_data
*
pei_data
)
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{
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pei_data
->
spd_addresses
[0] = 0xa0;
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pei_data
->
spd_addresses
[2] = 0xa4;
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pei_data
->
dimm_channel0_disabled
= 2;
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pei_data
->
dimm_channel1_disabled
= 2;
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/* Enable 2x refresh mode */
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pei_data
->
ddr_refresh_2x
= 1;
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pei_data
->
dq_pins_interleaved
= 1;
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}
variant.h
mainboard_fill_spd_data
void mainboard_fill_spd_data(struct pei_data *pei_data)
Definition:
spd.c:102
pei_data.h
pei_data
Definition:
pei_data.h:42
pei_data::dimm_channel0_disabled
int dimm_channel0_disabled
Definition:
pei_data.h:68
pei_data::spd_addresses
uint8_t spd_addresses[4]
Definition:
pei_data.h:60
pei_data::dq_pins_interleaved
int dq_pins_interleaved
Definition:
pei_data.h:72
pei_data::dimm_channel1_disabled
int dimm_channel1_disabled
Definition:
pei_data.h:69
pei_data::ddr_refresh_2x
int ddr_refresh_2x
Definition:
pei_data.h:71
src
mainboard
google
auron
variants
buddy
spd
spd.c
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