coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pei_data.h
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1 /* SPDX-License-Identifier: BSD-3-Clause */
2 
3 #ifndef PEI_DATA_H
4 #define PEI_DATA_H
5 
6 #include <stdint.h>
7 
8 typedef void (*tx_byte_func)(unsigned char byte);
9 #define PEI_VERSION 15
10 
11 #define SPD_LEN 256
12 
13 #define PEI_USB_OC_PIN_SKIP 8
14 
23 };
24 
25 /* Usb Port Length:
26  * [16:4] = length in inches in octal format
27  * [3:0] = decimal point
28  */
35 
39 } __packed;
40 
41 struct pei_data
42 {
49  /* Unused by HSW MRC, but changes to the memory layout of this struct break the ABI */
57  /* System type: 0 => Mobile, 1 => Desktop/Server, 5 => ULT, Others => Reserved */
61  int boot_mode;
64  // 0 = leave channel enabled
65  // 1 = disable dimm 0 on channel
66  // 2 = disable dimm 1 on channel
67  // 3 = disable dimm 0+1 on channel
70  /* Enable 2x Refresh Mode */
73  /* Data read from flash and passed into MRC */
74  unsigned char *mrc_input;
75  unsigned int mrc_input_len;
76  /* Data from MRC that should be saved to flash */
77  unsigned char *mrc_output;
78  unsigned int mrc_output_len;
79  /* Max frequency to run DDR3 at. Can be one of four values: 800, 1067, 1333, 1600 */
81  /* Route all USB ports to XHCI controller in resume path */
87 } __packed;
88 
89 #endif
#define SPD_LEN
Definition: pei_data.h:11
struct pei_usb2_port_setting __packed
void(* tx_byte_func)(unsigned char byte)
Definition: pei_data.h:8
pei_usb2_port_location
Definition: pei_data.h:15
@ PEI_USB_PORT_SKIP
Definition: pei_data.h:22
@ PEI_USB_PORT_MINI_PCIE
Definition: pei_data.h:19
@ PEI_USB_PORT_FRONT_PANEL
Definition: pei_data.h:17
@ PEI_USB_PORT_DOCK
Definition: pei_data.h:18
@ PEI_USB_PORT_INTERNAL
Definition: pei_data.h:21
@ PEI_USB_PORT_FLEX
Definition: pei_data.h:20
@ PEI_USB_PORT_BACK_PANEL
Definition: pei_data.h:16
unsigned short uint16_t
Definition: stdint.h:11
unsigned int uint32_t
Definition: stdint.h:14
unsigned char uint8_t
Definition: stdint.h:8
int dimm_channel0_disabled
Definition: pei_data.h:68
uint8_t spd_addresses[4]
Definition: pei_data.h:60
struct pei_usb2_port_setting usb2_ports[16]
Definition: pei_data.h:83
uint32_t tseg_size
Definition: pei_data.h:59
unsigned char * mrc_input
Definition: pei_data.h:74
int gbe_enable
Definition: pei_data.h:63
uint32_t system_type
Definition: pei_data.h:58
unsigned char * mrc_output
Definition: pei_data.h:77
uint32_t rcba
Definition: pei_data.h:53
uint32_t gpiobase
Definition: pei_data.h:55
uint32_t pciexbar
Definition: pei_data.h:47
int dq_pins_interleaved
Definition: pei_data.h:72
int dimm_channel1_disabled
Definition: pei_data.h:69
unsigned int mrc_output_len
Definition: pei_data.h:78
int ec_present
Definition: pei_data.h:62
unsigned int mrc_input_len
Definition: pei_data.h:75
tx_byte_func tx_byte
Definition: pei_data.h:86
uint32_t temp_mmio_base
Definition: pei_data.h:56
uint32_t pei_version
Definition: pei_data.h:43
struct pei_usb3_port_setting usb3_ports[16]
Definition: pei_data.h:84
uint16_t smbusbar
Definition: pei_data.h:48
uint32_t pmbase
Definition: pei_data.h:54
int usb_xhci_on_resume
Definition: pei_data.h:82
uint32_t mchbar
Definition: pei_data.h:44
uint32_t hpet_address
Definition: pei_data.h:52
uint8_t spd_data[4][SPD_LEN]
Definition: pei_data.h:85
uint32_t dmibar
Definition: pei_data.h:45
uint32_t epbar
Definition: pei_data.h:46
uint32_t max_ddr3_freq
Definition: pei_data.h:80
int boot_mode
Definition: pei_data.h:61
uint32_t _unused_wdbbar
Definition: pei_data.h:50
uint32_t _unused_wdbsize
Definition: pei_data.h:51
int ddr_refresh_2x
Definition: pei_data.h:71
uint8_t over_current_pin
Definition: pei_data.h:32
uint8_t over_current_pin
Definition: pei_data.h:38
typedef void(X86APIP X86EMU_intrFuncs)(int num)