coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cfg.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_BLOCK_CFG_H
4 #define SOC_INTEL_COMMON_BLOCK_CFG_H
5 
6 #include <boot/coreboot_tables.h>
7 #include <intelblocks/gspi.h>
9 #include <intelblocks/mmc.h>
10 
11 enum {
12  CHIPSET_LOCKDOWN_COREBOOT = 0, /* coreboot handles locking */
13  CHIPSET_LOCKDOWN_FSP, /* FSP handles locking per UPDs */
14 };
15 
16 /*
17  * This structure will hold data required by common blocks.
18  * These are soc specific configurations which will be filled by soc.
19  * We'll fill this structure once during init and use the data in common block.
20  */
23  struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
24  struct dw_i2c_bus_config i2c[CONFIG_SOC_INTEL_I2C_DEV_MAX];
25  /* PCH Thermal Trip Temperature in deg C */
27  struct mmc_dll_params emmc_dll;
29 };
30 
31 /* This function to retrieve soc config structure required by common code */
33 
34 #endif /* SOC_INTEL_COMMON_BLOCK_CFG_H */
lb_fb_orientation
coreboot framebuffer
const struct soc_intel_common_config * chip_get_common_soc_structure(void)
Definition: chip.c:5
@ CHIPSET_LOCKDOWN_FSP
Definition: cfg.h:13
@ CHIPSET_LOCKDOWN_COREBOOT
Definition: cfg.h:12
unsigned char uint8_t
Definition: stdint.h:8
Definition: gspi.h:12
struct mmc_dll_params emmc_dll
Definition: cfg.h:27
uint8_t pch_thermal_trip
Definition: cfg.h:26
enum lb_fb_orientation panel_orientation
Definition: cfg.h:28
struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]
Definition: cfg.h:23
struct dw_i2c_bus_config i2c[CONFIG_SOC_INTEL_I2C_DEV_MAX]
Definition: cfg.h:24