coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lv2.h
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* Driver for BayHub Technology LV2 PCIe to SD bridge */
4 
5 #include <types.h>
6 
7 enum {
8  LV2_PROTECT = 0xD0,
15  LV2_ASPM_L1_TIMER = 0x000E0000,
16  LV2_ASPM_L1_TIMER_MASK = 0xFFF0FFFF,
20  LV2_PCI_PM_L1_TIMER = 0x30000000,
22  LV2_PCR_HEX_234 = 0x234,
24  LV2_PCR_HEX_3F4 = 0x3F4,
27  LV2_PCR_HEX_300 = 0x300,
28  LV2_TUNING_WINDOW = 0x00006055,
29  LV2_TUNING_WINDOW_MASK = 0xFFFF0F00,
30  LV2_PCR_HEX_304 = 0x304,
31  LV2_DRIVER_STRENGTH = 0x0000224B,
33  LV2_PCR_HEX_308 = 0x308,
34  LV2_RESET_DMA_DISABLE = 0x00C00000,
36 };
#define BIT(nr)
Definition: ec_commands.h:45
@ LV2_PROTECT
Definition: lv2.h:8
@ LV2_DRIVER_STRENGTH_MASK
Definition: lv2.h:32
@ LV2_RESET_DMA_DISABLE
Definition: lv2.h:34
@ LV2_PCR_HEX_300
Definition: lv2.h:27
@ LV2_DRIVER_STRENGTH
Definition: lv2.h:31
@ LV2_PCR_HEX_FC
Definition: lv2.h:13
@ LV2_L1_SUBSTATE_OPTIMISE
Definition: lv2.h:25
@ LV2_PCIE_PHY_P1_ENABLE
Definition: lv2.h:14
@ LV2_PCI_PM_L1_TIMER_MASK
Definition: lv2.h:21
@ LV2_PCR_HEX_E0
Definition: lv2.h:19
@ LV2_PCR_HEX_234
Definition: lv2.h:22
@ LV2_MAX_LATENCY_SETTING
Definition: lv2.h:23
@ LV2_RESET_DMA_DISABLE_MASK
Definition: lv2.h:35
@ LV2_PCR_HEX_3F4
Definition: lv2.h:24
@ LV2_PROTECT_OFF
Definition: lv2.h:11
@ LV2_ASPM_L1_TIMER
Definition: lv2.h:15
@ LV2_LTR_ENABLE
Definition: lv2.h:18
@ LV2_PCR_HEX_308
Definition: lv2.h:33
@ LV2_TUNING_WINDOW
Definition: lv2.h:28
@ LV2_PROTECT_LOCK_OFF
Definition: lv2.h:9
@ LV2_PCR_HEX_304
Definition: lv2.h:30
@ LV2_PROTECT_LOCK_ON
Definition: lv2.h:10
@ LV2_PCR_HEX_A8
Definition: lv2.h:17
@ LV2_TUNING_WINDOW_MASK
Definition: lv2.h:29
@ LV2_PROTECT_ON
Definition: lv2.h:12
@ LV2_PCI_PM_L1_TIMER
Definition: lv2.h:20
@ LV2_L1_SUBSTATE_OPTIMISE_MASK
Definition: lv2.h:26
@ LV2_ASPM_L1_TIMER_MASK
Definition: lv2.h:16