Macros
#define	XCAP 0x40

#define	SI (1 << 24)

#define	DCAP 0x44

#define	MPS_MASK 0x7

#define	DCTL_DSTS 0x48

#define	URE (1 << 3)

#define	FEE (1 << 2)

#define	NFE (1 << 1)

#define	CEE (1 << 0)

#define	LCAP 0x4c

#define	L1EXIT_SHIFT 15

#define	L1EXIT_MASK (0x7 << L1EXIT_SHIFT)

#define	LCTL 0x50

#define	CCC (1 << 6)

#define	RL (1 << 5)

#define	LD (1 << 4)

#define	LSTS 0x52

#define	SLCAP 0x54

#define	SLN_SHIFT 19

#define	SLS_SHIFT 15

#define	SLV_SHIFT 7

#define	HPC (1 << 6)

#define	HPS (1 << 5)

#define	SLCTL_SLSTS 0x58

#define	PDS (1 << 22)

#define	DCAP2 0x64

#define	OBFFS (0x3 << 18)

#define	LTRMS (1 << 11)

#define	DSTS2 0x68

#define	OBFFEN (3 << 13)

#define	LTRME (1 << 10)

#define	CTD (1 << 4)

#define	CHCFG 0xd0

#define	UPSD (1 << 24)

#define	UNRS (1 << 15)

#define	UPRS (1 << 14)

#define	MPC2 0xd4

#define	IPF (1 << 11)

#define	LSTP (1 << 6)

#define	EOIFD (1 << 1)

#define	MPC 0xd8

#define	CCEL_SHIFT 15

#define	CCEL_MASK (0x7 << CCEL_SHIFT)

#define	RPPGEN 0xe0

#define	RPSCGEN (1 << 15)

#define	LCLKREQEN (1 << 13)

#define	BBCLKREQEN (1 << 12)

#define	SRDLCGEN (1 << 11)

#define	SRDBCGEN (1 << 10)

#define	RPDLCGEN (1 << 9)

#define	RPDBCGEN (1 << 8)

#define	PWRCTL 0xe8

#define	RPL1SQPOL (1 << 1)

#define	RPDTSQPOL (1 << 0)

#define	PHYCTL2_IOSFBCTL 0xf4

#define	PLL_OFF_EN (1 << 8)

#define	TDFT (3 << 14)

#define	TXCFGCHWAIT (3 << 12)

#define	SIID (3 << 26)

#define	STRPFUSECFG 0xfc

#define	LANECFG_SHIFT 14

#define	LANECFG_MASK (0x3 << LANECFG_SHIFT)

#define	AERCH 0x100

#define	NFTS 0x314

#define	L0SC 0x318

#define	CFG2 0x320

#define	CSREN (1 << 22)

#define	LATGC_SHIFT 6

#define	LATGC_MASK (0x7 << LATGC_SHIFT)

#define	PCIEDBG 0x324

#define	SPCE (1 << 5)

#define	PCIESTS1 0x328

#define	PCIEALC 0x338

#define	RTP 0x33c

#define	PHYCTL4 0x408

#define	SQDIS (1 << 27)

#define	PCIE_ROOT_PORT_COUNT 4

Macro Definition Documentation

◆ AERCH

#define AERCH 0x100

Definition at line 69 of file pcie.h.

◆ BBCLKREQEN

#define BBCLKREQEN (1 << 12)

Definition at line 53 of file pcie.h.

◆ CCC

#define CCC (1 << 6)

Definition at line 20 of file pcie.h.

◆ CCEL_MASK

#define CCEL_MASK (0x7 << CCEL_SHIFT)

Definition at line 49 of file pcie.h.

◆ CCEL_SHIFT

#define CCEL_SHIFT 15

Definition at line 48 of file pcie.h.

◆ CEE

#define CEE (1 << 0)

Definition at line 15 of file pcie.h.

◆ CFG2

#define CFG2 0x320

Definition at line 72 of file pcie.h.

◆ CHCFG

#define CHCFG 0xd0

Definition at line 39 of file pcie.h.

◆ CSREN

#define CSREN (1 << 22)

Definition at line 73 of file pcie.h.

◆ CTD

#define CTD (1 << 4)

Definition at line 38 of file pcie.h.

◆ DCAP

#define DCAP 0x44

Definition at line 9 of file pcie.h.

◆ DCAP2

#define DCAP2 0x64

Definition at line 32 of file pcie.h.

◆ DCTL_DSTS

#define DCTL_DSTS 0x48

Definition at line 11 of file pcie.h.

◆ DSTS2

#define DSTS2 0x68

Definition at line 35 of file pcie.h.

◆ EOIFD

#define EOIFD (1 << 1)

Definition at line 46 of file pcie.h.

◆ FEE

#define FEE (1 << 2)

Definition at line 13 of file pcie.h.

◆ HPC

#define HPC (1 << 6)

Definition at line 28 of file pcie.h.

◆ HPS

#define HPS (1 << 5)

Definition at line 29 of file pcie.h.

◆ IPF

#define IPF (1 << 11)

Definition at line 44 of file pcie.h.

◆ L0SC

#define L0SC 0x318

Definition at line 71 of file pcie.h.

◆ L1EXIT_MASK

#define L1EXIT_MASK (0x7 << L1EXIT_SHIFT)

Definition at line 18 of file pcie.h.

◆ L1EXIT_SHIFT

#define L1EXIT_SHIFT 15

Definition at line 17 of file pcie.h.

◆ LANECFG_MASK

#define LANECFG_MASK (0x3 << LANECFG_SHIFT)

Definition at line 68 of file pcie.h.

◆ LANECFG_SHIFT

#define LANECFG_SHIFT 14

Definition at line 67 of file pcie.h.

◆ LATGC_MASK

#define LATGC_MASK (0x7 << LATGC_SHIFT)

Definition at line 75 of file pcie.h.

◆ LATGC_SHIFT

#define LATGC_SHIFT 6

Definition at line 74 of file pcie.h.

◆ LCAP

#define LCAP 0x4c

Definition at line 16 of file pcie.h.

◆ LCLKREQEN

#define LCLKREQEN (1 << 13)

Definition at line 52 of file pcie.h.

◆ LCTL

#define LCTL 0x50

Definition at line 19 of file pcie.h.

◆ LD

#define LD (1 << 4)

Definition at line 22 of file pcie.h.

◆ LSTP

#define LSTP (1 << 6)

Definition at line 45 of file pcie.h.

◆ LSTS

#define LSTS 0x52

Definition at line 23 of file pcie.h.

◆ LTRME

#define LTRME (1 << 10)

Definition at line 37 of file pcie.h.

◆ LTRMS

#define LTRMS (1 << 11)

Definition at line 34 of file pcie.h.

◆ MPC

#define MPC 0xd8

Definition at line 47 of file pcie.h.

◆ MPC2

#define MPC2 0xd4

Definition at line 43 of file pcie.h.

◆ MPS_MASK

#define MPS_MASK 0x7

Definition at line 10 of file pcie.h.

◆ NFE

#define NFE (1 << 1)

Definition at line 14 of file pcie.h.

◆ NFTS

#define NFTS 0x314

Definition at line 70 of file pcie.h.

◆ OBFFEN

#define OBFFEN (3 << 13)

Definition at line 36 of file pcie.h.

◆ OBFFS

#define OBFFS (0x3 << 18)

Definition at line 33 of file pcie.h.

◆ PCIE_ROOT_PORT_COUNT

#define PCIE_ROOT_PORT_COUNT 4

Definition at line 84 of file pcie.h.

◆ PCIEALC

#define PCIEALC 0x338

Definition at line 79 of file pcie.h.

◆ PCIEDBG

#define PCIEDBG 0x324

Definition at line 76 of file pcie.h.

◆ PCIESTS1

#define PCIESTS1 0x328

Definition at line 78 of file pcie.h.

◆ PDS

#define PDS (1 << 22)

Definition at line 31 of file pcie.h.

◆ PHYCTL2_IOSFBCTL

#define PHYCTL2_IOSFBCTL 0xf4

Definition at line 61 of file pcie.h.

◆ PHYCTL4

#define PHYCTL4 0x408

Definition at line 81 of file pcie.h.

◆ PLL_OFF_EN

#define PLL_OFF_EN (1 << 8)

Definition at line 62 of file pcie.h.

◆ PWRCTL

#define PWRCTL 0xe8

Definition at line 58 of file pcie.h.

◆ RL

#define RL (1 << 5)

Definition at line 21 of file pcie.h.

◆ RPDBCGEN

#define RPDBCGEN (1 << 8)

Definition at line 57 of file pcie.h.

◆ RPDLCGEN

#define RPDLCGEN (1 << 9)

Definition at line 56 of file pcie.h.

◆ RPDTSQPOL

#define RPDTSQPOL (1 << 0)

Definition at line 60 of file pcie.h.

◆ RPL1SQPOL

#define RPL1SQPOL (1 << 1)

Definition at line 59 of file pcie.h.

◆ RPPGEN

#define RPPGEN 0xe0

Definition at line 50 of file pcie.h.

◆ RPSCGEN

#define RPSCGEN (1 << 15)

Definition at line 51 of file pcie.h.

◆ RTP

#define RTP 0x33c

Definition at line 80 of file pcie.h.

◆ SI

#define SI (1 << 24)

Definition at line 8 of file pcie.h.

◆ SIID

#define SIID (3 << 26)

Definition at line 65 of file pcie.h.

◆ SLCAP

#define SLCAP 0x54

Definition at line 24 of file pcie.h.

◆ SLCTL_SLSTS

#define SLCTL_SLSTS 0x58

Definition at line 30 of file pcie.h.

◆ SLN_SHIFT

#define SLN_SHIFT 19

Definition at line 25 of file pcie.h.

◆ SLS_SHIFT

#define SLS_SHIFT 15

Definition at line 26 of file pcie.h.

◆ SLV_SHIFT

#define SLV_SHIFT 7

Definition at line 27 of file pcie.h.

◆ SPCE

#define SPCE (1 << 5)

Definition at line 77 of file pcie.h.

◆ SQDIS

#define SQDIS (1 << 27)

Definition at line 82 of file pcie.h.

◆ SRDBCGEN

#define SRDBCGEN (1 << 10)

Definition at line 55 of file pcie.h.

◆ SRDLCGEN

#define SRDLCGEN (1 << 11)

Definition at line 54 of file pcie.h.

◆ STRPFUSECFG

#define STRPFUSECFG 0xfc

Definition at line 66 of file pcie.h.

◆ TDFT

#define TDFT (3 << 14)

Definition at line 63 of file pcie.h.

◆ TXCFGCHWAIT

#define TXCFGCHWAIT (3 << 12)

Definition at line 64 of file pcie.h.

◆ UNRS

#define UNRS (1 << 15)

Definition at line 41 of file pcie.h.

◆ UPRS

#define UPRS (1 << 14)

Definition at line 42 of file pcie.h.

◆ UPSD

#define UPSD (1 << 24)

Definition at line 40 of file pcie.h.

◆ URE

#define URE (1 << 3)

Definition at line 12 of file pcie.h.

◆ XCAP

#define XCAP 0x40

Definition at line 7 of file pcie.h.

Macros