superio.c File Reference

#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
#include <option.h>
#include <pc80/keyboard.h>
#include <superio/conf_mode.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <superio/common/ssdt.h>
#include <stdlib.h>
#include "npcd378.h"

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Functions
uint8_t	npcd378_hwm_read (const uint16_t iobase, const uint16_t reg)
void	npcd378_hwm_write (const uint16_t iobase, const uint16_t reg, const uint8_t val)
void	npcd378_hwm_write_start (const uint16_t iobase)
void	npcd378_hwm_write_finished (const uint16_t iobase)
static void	npcd378_init (struct device *dev)
static void	enable_dev (struct device *dev)

Variables
static struct device_operations	ops
static struct pnp_info	pnp_dev_info []
struct chip_operations	superio_nuvoton_npcd378_ops

Function Documentation

enable_dev()

static void enable_dev ( struct device *  dev )

static

Definition at line 470 of file superio.c.

References ARRAY_SIZE, ops, pnp_dev_info, and pnp_enable_devices().

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npcd378_hwm_read()

uint8_t npcd378_hwm_read	(	const uint16_t	iobase,
		const uint16_t	reg
	)

Definition at line 17 of file superio.c.

References inb(), and outb().

Referenced by npcd378_hwm_write_finished(), and npcd378_hwm_write_start().

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npcd378_hwm_write()

void npcd378_hwm_write	(	const uint16_t	iobase,
		const uint16_t	reg,
		const uint8_t	val
	)

Definition at line 28 of file superio.c.

References outb(), and val.

Referenced by npcd378_hwm_write_finished(), npcd378_hwm_write_start(), and npcd378_init().

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npcd378_hwm_write_finished()

void npcd378_hwm_write_finished

(

const uint16_t

iobase

)

Definition at line 43 of file superio.c.

References npcd378_hwm_read(), npcd378_hwm_write(), NPCD837_HWM_WRITE_LOCK_BIT, and NPCD837_HWM_WRITE_LOCK_CTRL.

Referenced by npcd378_init().

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npcd378_hwm_write_start()

void npcd378_hwm_write_start

(

const uint16_t

iobase

)

Definition at line 36 of file superio.c.

References npcd378_hwm_read(), npcd378_hwm_write(), NPCD837_HWM_WRITE_LOCK_BIT, and NPCD837_HWM_WRITE_LOCK_CTRL.

Referenced by npcd378_init().

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npcd378_init()

static void npcd378_init ( struct device *  dev )

static

Definition at line 50 of file superio.c.

References resource::base, BIOS_ERR, BIOS_INFO, pnp_path::device, device::enabled, get_uint_option(), NPCD378_HWM, NPCD378_HWM_PSU_FAN_MAX, NPCD378_HWM_PSU_FAN_MIN, NPCD378_HWM_PSU_FAN_PWM_CTRL, npcd378_hwm_write(), npcd378_hwm_write_finished(), npcd378_hwm_write_start(), NPCD378_KBC, device::path, pc_keyboard_init(), device_path::pnp, PNP_IDX_IO0, printk, PROBE_AUX_DEVICE, and probe_resource().

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Variable Documentation

ops

struct device_operations ops

static

Initial value:

= {
        .read_resources   = pnp_read_resources,
        .set_resources    = pnp_set_resources,
        .enable_resources = pnp_enable_resources,
        .enable           = pnp_alt_enable,
        .init             = npcd378_init,
        .ops_pnp_mode     = &pnp_conf_mode_8787_aa,
 
 
 
 
 
}

Definition at line 50 of file superio.c.

Referenced by enable_dev().

pnp_dev_info

struct pnp_info pnp_dev_info[]

static

Initial value:

= {
        { NULL, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
        { NULL, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
        { NULL, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, },
        { NULL, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, },
        { NULL, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
                PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|
                PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,
                0x0ff8, 0x0ff0},
        { NULL, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, },
        { NULL, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0,
                0x0fff, 0x0fff, },
        { NULL, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9|
                PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, 0x0fe0},
        { NULL, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
                PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_IRQ0, 0x0f00},
        { NULL, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
                PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_MSC8|PNP_MSC9|PNP_MSCA|
                PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE},
        { NULL, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
                PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|
                PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,
                0x0ff0, 0x0ff0},
        { NULL, NPCD378_SUSPEND, PNP_IO0, 0x0fe0 },
        { NULL, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
                PNP_MSC4, 0x0fe0},
}

Definition at line 50 of file superio.c.

Referenced by enable_dev().

superio_nuvoton_npcd378_ops

struct chip_operations superio_nuvoton_npcd378_ops

Initial value:

= {
 
        .enable_dev = enable_dev,
}

Definition at line 470 of file superio.c.