coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <qusb_phy.h>
Data Fields | |
u8 | rsvd0 [4] |
u32 | analog_controls_two |
u8 | rsvd1 [36] |
u32 | cmode |
u8 | rsvd2 [132] |
u32 | dig_tim |
u8 | rsvd3 [204] |
u32 | lock_delay |
u8 | rsvd4 [4] |
u32 | clock_inverters |
u8 | rsvd5 [4] |
u32 | bias_ctrl_1 |
u32 | bias_ctrl_2 |
Definition at line 72 of file qusb_phy.h.
u32 usb_qusb_phy_pll::analog_controls_two |
Definition at line 74 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u32 usb_qusb_phy_pll::bias_ctrl_1 |
Definition at line 84 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u32 usb_qusb_phy_pll::bias_ctrl_2 |
Definition at line 85 of file qusb_phy.h.
Referenced by hs_usb_phy_init(), and qusb2_phy_override_phy_params().
u32 usb_qusb_phy_pll::clock_inverters |
Definition at line 82 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u32 usb_qusb_phy_pll::cmode |
Definition at line 76 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u32 usb_qusb_phy_pll::dig_tim |
Definition at line 78 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u32 usb_qusb_phy_pll::lock_delay |
Definition at line 80 of file qusb_phy.h.
Referenced by hs_usb_phy_init().
u8 usb_qusb_phy_pll::rsvd0[4] |
Definition at line 73 of file qusb_phy.h.
u8 usb_qusb_phy_pll::rsvd1[36] |
Definition at line 75 of file qusb_phy.h.
u8 usb_qusb_phy_pll::rsvd2[132] |
Definition at line 77 of file qusb_phy.h.
u8 usb_qusb_phy_pll::rsvd3[204] |
Definition at line 79 of file qusb_phy.h.
u8 usb_qusb_phy_pll::rsvd4[4] |
Definition at line 81 of file qusb_phy.h.
u8 usb_qusb_phy_pll::rsvd5[4] |
Definition at line 83 of file qusb_phy.h.