coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soc_intel_xeon_sp_skx_config Struct Reference

#include <chip.h>

Collaboration diagram for soc_intel_xeon_sp_skx_config:
Collaboration graph

Data Fields

struct soc_intel_common_config common_soc_config
 
uint8_t pirqa_routing
 Interrupt Routing configuration If bit7 is 1, the interrupt is disabled. More...
 
uint8_t pirqb_routing
 
uint8_t pirqc_routing
 
uint8_t pirqd_routing
 
uint8_t pirqe_routing
 
uint8_t pirqf_routing
 
uint8_t pirqg_routing
 
uint8_t pirqh_routing
 
uint16_t ir00_routing
 Device Interrupt Routing configuration Interrupt Pin x Route. More...
 
uint16_t ir01_routing
 
uint16_t ir02_routing
 
uint16_t ir03_routing
 
uint16_t ir04_routing
 
uint32_t ipc0
 Device Interrupt Polarity Control ipc0 - IRQ-00-31 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc1 - IRQ-32-63 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc2 - IRQ-64-95 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc3 - IRQ-96-119 - 1: Active low to IOAPIC, 0: Active high to IOAPIC. More...
 
uint32_t ipc1
 
uint32_t ipc2
 
uint32_t ipc3
 
uint64_t turbo_ratio_limit
 
uint64_t turbo_ratio_limit_cores
 
uint32_t pstate_req_ratio
 
uint32_t vtd_support
 
uint32_t coherency_support
 
uint32_t ats_support
 
uint32_t gen1_dec
 
uint32_t gen2_dec
 
uint32_t gen3_dec
 
uint32_t gen4_dec
 
uint32_t tcc_offset
 
enum acpi_cstate_mode cstate_states
 

Detailed Description

Definition at line 12 of file chip.h.

Field Documentation

◆ ats_support

uint32_t soc_intel_xeon_sp_skx_config::ats_support

Definition at line 67 of file chip.h.

◆ coherency_support

uint32_t soc_intel_xeon_sp_skx_config::coherency_support

Definition at line 66 of file chip.h.

◆ common_soc_config

struct soc_intel_common_config soc_intel_xeon_sp_skx_config::common_soc_config

Definition at line 1 of file chip.h.

◆ cstate_states

enum acpi_cstate_mode soc_intel_xeon_sp_skx_config::cstate_states

Definition at line 76 of file chip.h.

◆ gen1_dec

uint32_t soc_intel_xeon_sp_skx_config::gen1_dec

Definition at line 70 of file chip.h.

◆ gen2_dec

uint32_t soc_intel_xeon_sp_skx_config::gen2_dec

Definition at line 71 of file chip.h.

◆ gen3_dec

uint32_t soc_intel_xeon_sp_skx_config::gen3_dec

Definition at line 72 of file chip.h.

◆ gen4_dec

uint32_t soc_intel_xeon_sp_skx_config::gen4_dec

Definition at line 73 of file chip.h.

◆ ipc0

uint32_t soc_intel_xeon_sp_skx_config::ipc0

Device Interrupt Polarity Control ipc0 - IRQ-00-31 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc1 - IRQ-32-63 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc2 - IRQ-64-95 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc3 - IRQ-96-119 - 1: Active low to IOAPIC, 0: Active high to IOAPIC.

Definition at line 55 of file chip.h.

◆ ipc1

uint32_t soc_intel_xeon_sp_skx_config::ipc1

Definition at line 56 of file chip.h.

◆ ipc2

uint32_t soc_intel_xeon_sp_skx_config::ipc2

Definition at line 57 of file chip.h.

◆ ipc3

uint32_t soc_intel_xeon_sp_skx_config::ipc3

Definition at line 58 of file chip.h.

◆ ir00_routing

uint16_t soc_intel_xeon_sp_skx_config::ir00_routing

Device Interrupt Routing configuration Interrupt Pin x Route.

0h = PIRQA# 1h = PIRQB# 2h = PIRQC# 3h = PIRQD# 4h = PIRQE# 5h = PIRQF# 6h = PIRQG# 7h = PIRQH#

Definition at line 42 of file chip.h.

◆ ir01_routing

uint16_t soc_intel_xeon_sp_skx_config::ir01_routing

Definition at line 43 of file chip.h.

◆ ir02_routing

uint16_t soc_intel_xeon_sp_skx_config::ir02_routing

Definition at line 44 of file chip.h.

◆ ir03_routing

uint16_t soc_intel_xeon_sp_skx_config::ir03_routing

Definition at line 45 of file chip.h.

◆ ir04_routing

uint16_t soc_intel_xeon_sp_skx_config::ir04_routing

Definition at line 46 of file chip.h.

◆ pirqa_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqa_routing

Interrupt Routing configuration If bit7 is 1, the interrupt is disabled.

Definition at line 20 of file chip.h.

◆ pirqb_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqb_routing

Definition at line 21 of file chip.h.

◆ pirqc_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqc_routing

Definition at line 22 of file chip.h.

◆ pirqd_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqd_routing

Definition at line 23 of file chip.h.

◆ pirqe_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqe_routing

Definition at line 24 of file chip.h.

◆ pirqf_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqf_routing

Definition at line 25 of file chip.h.

◆ pirqg_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqg_routing

Definition at line 26 of file chip.h.

◆ pirqh_routing

uint8_t soc_intel_xeon_sp_skx_config::pirqh_routing

Definition at line 27 of file chip.h.

◆ pstate_req_ratio

uint32_t soc_intel_xeon_sp_skx_config::pstate_req_ratio

Definition at line 63 of file chip.h.

◆ tcc_offset

uint32_t soc_intel_xeon_sp_skx_config::tcc_offset

Definition at line 76 of file chip.h.

◆ turbo_ratio_limit

uint64_t soc_intel_xeon_sp_skx_config::turbo_ratio_limit

Definition at line 60 of file chip.h.

◆ turbo_ratio_limit_cores

uint64_t soc_intel_xeon_sp_skx_config::turbo_ratio_limit_cores

Definition at line 61 of file chip.h.

◆ vtd_support

uint32_t soc_intel_xeon_sp_skx_config::vtd_support

Definition at line 65 of file chip.h.


The documentation for this struct was generated from the following file: