coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _WIFI_GENERIC_H_
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#define _WIFI_GENERIC_H_
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/**
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* struct drivers_wifi_generic_config - Data structure to contain generic wifi config
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* @wake: Wake pin for ACPI _PRW
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*/
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struct
drivers_wifi_generic_config
{
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unsigned
int
wake
;
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/* When set to true, this will add a _DSD which contains a single
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property, `DmaProperty`, set to 1, under the ACPI Device. */
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bool
is_untrusted
;
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/*
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* Applicable for Intel chipsets that use CNVi WiFi only. Set this to 1
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* to enable CNVi DDR RFIM (radio frequency interference mitigation);
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* SoC code propagates this value the applicable FSP UPD.
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*/
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bool
enable_cnvi_ddr_rfim
;
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};
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#endif
/* _GENERIC_WIFI_H_ */
drivers_wifi_generic_config
struct drivers_wifi_generic_config - Data structure to contain generic wifi config @wake: Wake pin fo...
Definition:
chip.h:10
drivers_wifi_generic_config::is_untrusted
bool is_untrusted
Definition:
chip.h:14
drivers_wifi_generic_config::wake
unsigned int wake
Definition:
chip.h:11
drivers_wifi_generic_config::enable_cnvi_ddr_rfim
bool enable_cnvi_ddr_rfim
Definition:
chip.h:21
src
drivers
wifi
generic
chip.h
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