coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _WIFI_GENERIC_H_
4 #define _WIFI_GENERIC_H_
5 
6 /**
7  * struct drivers_wifi_generic_config - Data structure to contain generic wifi config
8  * @wake: Wake pin for ACPI _PRW
9  */
11  unsigned int wake;
12  /* When set to true, this will add a _DSD which contains a single
13  property, `DmaProperty`, set to 1, under the ACPI Device. */
15 
16  /*
17  * Applicable for Intel chipsets that use CNVi WiFi only. Set this to 1
18  * to enable CNVi DDR RFIM (radio frequency interference mitigation);
19  * SoC code propagates this value the applicable FSP UPD.
20  */
22 };
23 
24 #endif /* _GENERIC_WIFI_H_ */
struct drivers_wifi_generic_config - Data structure to contain generic wifi config @wake: Wake pin fo...
Definition: chip.h:10
unsigned int wake
Definition: chip.h:11