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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/smm_reloc.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/systemagent.h>
#include <soc/pm.h>
Go to the source code of this file.
Functions | |
void | smm_southbridge_clear_state (void) |
static void | smm_southbridge_enable (uint16_t pm1_events) |
void | global_smi_enable (void) |
Set the EOS bit and enable SMI generation from southbridge. More... | |
void | global_smi_enable_no_pwrbtn (void) |
Set the EOS bit and enable SMI generation from southbridge.
Definition at line 64 of file smm.c.
References GBL_EN, PWRBTN_EN, and smm_southbridge_enable().
Definition at line 69 of file smm.c.
References GBL_EN, and smm_southbridge_enable().
Referenced by post_mp_init().
Definition at line 10 of file smm.c.
References APMC_EN, BIOS_DEBUG, BIOS_INFO, pmc_clear_all_gpe_status(), pmc_clear_pm1_status(), pmc_clear_smi_status(), pmc_clear_tco_status(), pmc_get_smi_en(), and printk.
Definition at line 26 of file smm.c.
References BIOS_DEBUG, CONFIG, ENABLE_SMI_PARAMS, ESPI_SMI_EN, pmc_disable_all_gpe(), pmc_disable_std_gpe(), pmc_enable_pm1(), pmc_enable_smi(), PME_B0_EN, printk, and TCO_SMI_EN.
Referenced by global_smi_enable(), and global_smi_enable_no_pwrbtn().