coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nvs.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /*
4  * NOTE: The layout of the global_nvs structure below must match the layout
5  * in soc/soc/amd/cezanne/acpi/globalnvs.asl !!!
6  *
7  */
8 
9 #ifndef AMD_CEZANNE_NVS_H
10 #define AMD_CEZANNE_NVS_H
11 
12 #include <stdint.h>
13 
15  /* Miscellaneous */
16  uint8_t unused_was_pcnt; /* 0x00 - Processor Count */
17  uint8_t lids; /* 0x01 - LID State */
18  uint8_t unused_was_pwrs; /* 0x02 - AC Power State */
19  uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */
20  uint64_t pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */
21  uint64_t gpei; /* 0x0f - 0x16 - GPE Wake Source */
22  uint8_t tmps; /* 0x17 - Temperature Sensor ID */
23  uint8_t tcrt; /* 0x18 - Critical Threshold */
24  uint8_t tpsv; /* 0x19 - Passive Threshold */
25 };
26 
27 #endif /* AMD_CEZANNE_NVS_H */
unsigned int uint32_t
Definition: stdint.h:14
unsigned long long uint64_t
Definition: stdint.h:17
unsigned char uint8_t
Definition: stdint.h:8
Definition: x86.c:23
Definition: nvs.h:14
uint8_t lids
Definition: nvs.h:17
uint8_t tcrt
Definition: nvs.h:23
uint64_t gpei
Definition: nvs.h:21
uint8_t unused_was_pcnt
Definition: nvs.h:16
uint8_t tmps
Definition: nvs.h:22
uint8_t tpsv
Definition: nvs.h:24
uint64_t pm1i
Definition: nvs.h:20
uint8_t unused_was_pwrs
Definition: nvs.h:18
uint32_t cbmc
Definition: nvs.h:19