Go to the source code of this file.
|
#define | MCAX_MSR_BASE 0xc0002000 |
|
#define | MCAX_BANK_SIZE 0x10 |
|
#define | MCAX_CTL_OFFSET 0x0 |
|
#define | MCAX_STATUS_OFFSET 0x1 |
|
#define | MCAX_ADDR_OFFSET 0x2 |
|
#define | MCAX_MISC0_OFFSET 0x3 |
|
#define | MCAX_CONFIG_OFFSET 0x4 |
|
#define | MCAX_IPID_OFFSET 0x5 |
|
#define | MCAX_SYND_OFFSET 0x6 |
|
#define | MCAX_RESERVED_OFFSET 0x7 |
|
#define | MCAX_DESTAT_OFFSET 0x8 |
|
#define | MCAX_DEADDR_OFFSET 0x9 |
|
#define | MCAX_MISC1_OFFSET 0xa |
|
#define | MCAX_MISC2_OFFSET 0xb |
|
#define | MCAX_MISC3_OFFSET 0xc |
|
#define | MCAX_MISC4_OFFSET 0xd |
|
#define | MCAX_MSR(bank, offset) (MCAX_MSR_BASE + (bank) * MCAX_BANK_SIZE + (offset)) |
|
#define | MCAX_CTL_MSR(bank) MCAX_MSR(bank, MCAX_CTL_OFFSET) |
|
#define | MCAX_STATUS_MSR(bank) MCAX_MSR(bank, MCAX_STATUS_OFFSET) |
|
#define | MCAX_ADDR_MSR(bank) MCAX_MSR(bank, MCAX_ADDR_OFFSET) |
|
#define | MCAX_MISC0_MSR(bank) MCAX_MSR(bank, MCAX_MISC0_OFFSET) |
|
#define | MCAX_CONFIG_MSR(bank) MCAX_MSR(bank, MCAX_CONFIG_OFFSET) |
|
#define | MCAX_IPID_MSR(bank) MCAX_MSR(bank, MCAX_IPID_OFFSET) |
|
#define | MCAX_SYND_MSR(bank) MCAX_MSR(bank, MCAX_SYND_OFFSET) |
|
#define | MCAX_DESTAT_MSR(bank) MCAX_MSR(bank, MCAX_DESTAT_OFFSET) |
|
#define | MCAX_DEADDR_MSR(bank) MCAX_MSR(bank, MCAX_DEADDR_OFFSET) |
|
#define | MCAX_MISC1_MSR(bank) MCAX_MSR(bank, MCAX_MISC1_OFFSET) |
|
#define | MCAX_MISC2_MSR(bank) MCAX_MSR(bank, MCAX_MISC2_OFFSET) |
|
#define | MCAX_MISC3_MSR(bank) MCAX_MSR(bank, MCAX_MISC3_OFFSET) |
|
#define | MCAX_MISC4_MSR(bank) MCAX_MSR(bank, MCAX_MISC4_OFFSET) |
|
#define | MCA_CTL_MASK_MSR_0 0xc0010400 |
|
#define | MCA_CTL_MASK_MSR(bank) (MCA_CTL_MASK_MSR_0 + (bank)) |
|
◆ MCA_CTL_MASK_MSR
◆ MCA_CTL_MASK_MSR_0
#define MCA_CTL_MASK_MSR_0 0xc0010400 |
◆ MCAX_ADDR_MSR
◆ MCAX_ADDR_OFFSET
#define MCAX_ADDR_OFFSET 0x2 |
◆ MCAX_BANK_SIZE
#define MCAX_BANK_SIZE 0x10 |
◆ MCAX_CONFIG_MSR
◆ MCAX_CONFIG_OFFSET
#define MCAX_CONFIG_OFFSET 0x4 |
◆ MCAX_CTL_MSR
◆ MCAX_CTL_OFFSET
#define MCAX_CTL_OFFSET 0x0 |
◆ MCAX_DEADDR_MSR
◆ MCAX_DEADDR_OFFSET
#define MCAX_DEADDR_OFFSET 0x9 |
◆ MCAX_DESTAT_MSR
◆ MCAX_DESTAT_OFFSET
#define MCAX_DESTAT_OFFSET 0x8 |
◆ MCAX_IPID_MSR
◆ MCAX_IPID_OFFSET
#define MCAX_IPID_OFFSET 0x5 |
◆ MCAX_MISC0_MSR
◆ MCAX_MISC0_OFFSET
#define MCAX_MISC0_OFFSET 0x3 |
◆ MCAX_MISC1_MSR
◆ MCAX_MISC1_OFFSET
#define MCAX_MISC1_OFFSET 0xa |
◆ MCAX_MISC2_MSR
◆ MCAX_MISC2_OFFSET
#define MCAX_MISC2_OFFSET 0xb |
◆ MCAX_MISC3_MSR
◆ MCAX_MISC3_OFFSET
#define MCAX_MISC3_OFFSET 0xc |
◆ MCAX_MISC4_MSR
◆ MCAX_MISC4_OFFSET
#define MCAX_MISC4_OFFSET 0xd |
◆ MCAX_MSR
◆ MCAX_MSR_BASE
#define MCAX_MSR_BASE 0xc0002000 |
◆ MCAX_RESERVED_OFFSET
#define MCAX_RESERVED_OFFSET 0x7 |
◆ MCAX_STATUS_MSR
◆ MCAX_STATUS_OFFSET
#define MCAX_STATUS_OFFSET 0x1 |
◆ MCAX_SYND_MSR
◆ MCAX_SYND_OFFSET
#define MCAX_SYND_OFFSET 0x6 |