coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <amdblocks/chip.h>
#include <commonlib/helpers.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <gpio.h>
#include <soc/i2c.h>
#include <soc/iomap.h>
#include <soc/southbridge.h>
#include <arch/x86/include/arch/smp/mpspec.h>
#include <types.h>
Go to the source code of this file.
Data Structures | |
struct | usb2_phy_tune |
union | usb3_force_gen1 |
struct | usb_pd_control |
struct | usb3_phy_tune |
struct | soc_amd_picasso_config |
Macros | |
#define | USB_PORT_COUNT 6 |
#define | RV2_USB3_PORT_COUNT 4 |
#define | USB_PD_PORT_COUNT 2 |
Enumerations | |
enum | rfmux_configuration_setting { USB_PD_RFMUX_SAFE_STATE = 0x0 , USB_PD_RFMUX_USB31_MODE = 0x1 , USB_PD_RFMUX_USB31_MODE_FLIP = 0x2 , USB_PD_RFMUX_ATE_MODE = 0x3 , USB_PD_RFMUX_DP_X2_MODE = 0x4 , USB_PD_RFMUX_MF_MODE_ALT_D_F = 0x6 , USB_PD_RFMUX_DP_X2_MODE_FLIP = 0x8 , USB_PD_RFMUX_MF_MODE_ALT_D_F_FLIP = 0x9 , USB_PD_RFMUX_DP_X4_MODE = 0xc } |
enum | sd_emmc_driver_strength { SD_EMMC_DRIVE_STRENGTH_B , SD_EMMC_DRIVE_STRENGTH_A , SD_EMMC_DRIVE_STRENGTH_C , SD_EMMC_DRIVE_STRENGTH_D } |
enum | sysinfo_dpphy_override { ENABLE_DVI_TUNINGSET = 0x01 , ENABLE_HDMI_TUNINGSET = 0x02 , ENABLE_HDMI6G_TUNINGSET = 0x04 , ENABLE_DP_TUNINGSET = 0x08 , ENABLE_DP_HBR3_TUNINGSET = 0x10 , ENABLE_DP_HBR_TUNINGSET = 0x20 , ENABLE_DP_HBR2_TUNINGSET = 0x40 , ENABLE_EDP_TUNINGSET = 0x80 } |