ramstage.c File Reference

#include <baseboard/variants.h>
#include <chip.h>
#include <device/device.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <ec/google/chromeec/ec.h>
#include <intelblocks/power_limit.h>

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Go to the source code of this file.

Functions
void	variant_devtree_update (void)

Variables
const struct cpu_power_limits	limits []
const struct system_power_limits	sys_limits []
const struct psys_config	psys_config

Function Documentation

variant_devtree_update()

void variant_devtree_update

(

void

)

Definition at line 63 of file ramstage.c.

References ARRAY_SIZE, limits, sys_limits, variant_update_power_limits(), and variant_update_psys_power_limits().

Referenced by mainboard_silicon_init_params().

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Variable Documentation

limits

const struct cpu_power_limits limits[]

Initial value:

= {
        
        { PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 15000,  55000,  55000, 123000 },
        { PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 15000,  55000,  55000, 123000 },
        { PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 15000,  55000,  55000, 123000 },
        { PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000,  64000,  64000,  90000 },
        { PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000,  64000,  64000, 140000 },
        { PCI_DID_INTEL_ADL_P_ID_5, 45, 45000, 45000,  95000,  95000, 125000 },
        { PCI_DID_INTEL_ADL_P_ID_4, 45, 45000, 45000, 115000, 115000, 215000 },
        { PCI_DID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 },
        { PCI_DID_INTEL_ADL_P_ID_1, 45, 45000, 45000,  95000,  95000, 125000 },
}

Definition at line 1 of file ramstage.c.

Referenced by avoid_fixed_resources(), constrain_resources(), dptf_write_power_limits(), get_sku_index(), resource_limit(), variant_devtree_update(), variant_update_power_limits(), and variant_update_psys_power_limits().

psys_config

const struct psys_config psys_config

Initial value:

= {
        .efficiency = 97,
        .psys_imax_ma = 13520,
        .bj_volts_mv = 19500
}

Definition at line 1 of file ramstage.c.

sys_limits

const struct system_power_limits sys_limits[]

Initial value:

= {
        
        { PCI_DID_INTEL_ADL_P_ID_10, 15, 135 },
        { PCI_DID_INTEL_ADL_P_ID_7, 15, 135 },
        { PCI_DID_INTEL_ADL_P_ID_6, 15, 135 },
        { PCI_DID_INTEL_ADL_P_ID_5, 28, 230 },
        { PCI_DID_INTEL_ADL_P_ID_3, 28, 230 },
        { PCI_DID_INTEL_ADL_P_ID_5, 45, 230 },
        { PCI_DID_INTEL_ADL_P_ID_4, 45, 230 },
        { PCI_DID_INTEL_ADL_P_ID_3, 45, 230 },
        { PCI_DID_INTEL_ADL_P_ID_1, 45, 230 },
}

Definition at line 1 of file ramstage.c.

Referenced by variant_devtree_update(), and variant_update_psys_power_limits().