coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /*
4  * This file is created based on Intel Alder Lake Processor PCH Datasheet
5  * Document number: 621483
6  * Chapter number: 7
7  */
8 
9 #include <intelblocks/fast_spi.h>
10 #include <intelblocks/spi.h>
11 #include <soc/pci_devs.h>
12 
13 #define PSF_SPI_DESTINATION_ID 0x23a8
14 
15 int spi_soc_devfn_to_bus(unsigned int devfn)
16 {
17  switch (devfn) {
18  case PCH_DEVFN_SPI:
19  return 0;
20  case PCH_DEVFN_GSPI0:
21  return 1;
22  case PCH_DEVFN_GSPI1:
23  return 2;
24  case PCH_DEVFN_GSPI2:
25  return 3;
26  case PCH_DEVFN_GSPI3:
27  return 4;
28  }
29  return -1;
30 }
31 
33 {
35 }
#define PCH_DEVFN_GSPI0
Definition: pci_devs.h:206
#define PCH_DEVFN_GSPI3
Definition: pci_devs.h:114
#define PCH_DEVFN_SPI
Definition: pci_devs.h:220
#define PCH_DEVFN_GSPI2
Definition: pci_devs.h:107
#define PCH_DEVFN_GSPI1
Definition: pci_devs.h:207
int spi_soc_devfn_to_bus(unsigned int devfn)
Definition: spi.c:15
uint32_t soc_get_spi_psf_destination_id(void)
Definition: spi.c:32
#define PSF_SPI_DESTINATION_ID
Definition: spi.c:13
unsigned int uint32_t
Definition: stdint.h:14