#include <dp.h>

Collaboration diagram for exynos5_dp:

Data Fields
u8	res1 [0x10]

u32	dp_tx_version

u32	dp_tx_sw_reset

u32	func_en_1

u32	func_en_2

u32	video_ctl_1

u32	video_ctl_2

u32	video_ctl_3

u32	video_ctl_4

u32	clr_blue_cb

u32	clr_green_y

u32	clr_red_cr

u32	video_ctl_8

u8	res2 [0x4]

u32	video_ctl_10

u32	total_line_l

u32	total_line_h

u32	active_line_l

u32	active_line_h

u32	v_f_porch

u32	vsync

u32	v_b_porch

u32	total_pixel_l

u32	total_pixel_h

u32	active_pixel_l

u32	active_pixel_h

u32	h_f_porch_l

u32	h_f_porch_h

u32	hsync_l

u32	hysnc_h

u32	h_b_porch_l

u32	h_b_porch_h

u32	vid_status

u32	total_line_sta_l

u32	total_line_sta_h

u32	active_line_sta_l

u32	active_line_sta_h

u32	v_f_porch_sta

u32	vsync_sta

u32	v_b_porch_sta

u32	total_pixel_sta_l

u32	total_pixel_sta_h

u32	active_pixel_sta_l

u32	active_pixel_sta_h

u32	h_f_porch_sta_l

u32	h_f_porch_sta_h

u32	hsync_sta_l

u32	hsync_sta_h

u32	h_b_porch_sta_l

u32	h_b_porch__sta_h

u8	res3 [0x288]

u32	lane_map

u8	res4 [0x10]

u32	analog_ctl_1

u32	analog_ctl_2

u32	analog_ctl_3

u32	pll_filter_ctl_1

u32	tx_amp_tuning_ctl

u8	res5 [0xc]

u32	aux_hw_retry_ctl

u8	res6 [0x2c]

u32	int_state

u32	common_int_sta_1

u32	common_int_sta_2

u32	common_int_sta_3

u32	common_int_sta_4

u8	res7 [0x8]

u32	dp_int_sta

u32	common_int_mask_1

u32	common_int_mask_2

u32	common_int_mask_3

u32	common_int_mask_4

u8	res8 [0x08]

u32	int_sta_mask

u32	int_ctl

u8	res9 [0x200]

u32	sys_ctl_1

u32	sys_ctl_2

u32	sys_ctl_3

u32	sys_ctl_4

u32	dp_vid_ctl

u8	res10 [0x2c]

u32	pkt_send_ctl

u8	res11 [0x4]

u32	dp_hdcp_ctl

u8	res12 [0x34]

u32	link_bw_set

u32	lane_count_set

u32	dp_training_ptn_set

u32	ln0_link_trn_ctl

u32	ln1_link_trn_ctl

u32	ln2_link_trn_ctl

u32	ln3_link_trn_ctl

u32	dp_dn_spread

u32	dp_hw_link_training

u8	res13 [0x1c]

u32	dp_debug_ctl

u32	dp_hpd_deglitch_l

u32	dp_hpd_deglitch_h

u8	res14 [0x14]

u32	dp_link_debug_ctl

u8	res15 [0x1c]

u32	m_vid_0

u32	m_vid_1

u32	m_vid_2

u32	n_vid_0

u32	n_vid_1

u32	n_vid_2

u32	m_vid_mon

u32	dp_pll_ctl

u32	dp_phy_pd

u32	dp_phy_test

u8	res16 [0x8]

u32	dp_video_fifo_thrd

u8	res17 [0x8]

u32	dp_audio_margin

u32	dp_dn_spread_ctl_1

u32	dp_dn_spread_ctl_2

u8	res18 [0x18]

u32	dp_m_cal_ctl

u32	m_vid_gen_filter_th

u8	res19 [0x14]

u32	m_aud_gen_filter_th

u32	aux_ch_sta

u32	aux_err_num

u32	aux_ch_defer_dtl

u32	aux_rx_comm

u32	buf_data_ctl

u32	aux_ch_ctl_1

u32	aux_addr_7_0

u32	aux_addr_15_8

u32	aux_addr_19_16

u32	aux_ch_ctl_2

u8	res20 [0x18]

u32	buf_data_0

u8	res21 [0x3c]

u32	soc_general_ctl

Detailed Description

Definition at line 11 of file dp.h.

Field Documentation

◆ active_line_h

u32 exynos5_dp::active_line_h

Definition at line 30 of file dp.h.

◆ active_line_l

u32 exynos5_dp::active_line_l

Definition at line 29 of file dp.h.

◆ active_line_sta_h

u32 exynos5_dp::active_line_sta_h

Definition at line 48 of file dp.h.

◆ active_line_sta_l

u32 exynos5_dp::active_line_sta_l

Definition at line 47 of file dp.h.

◆ active_pixel_h

u32 exynos5_dp::active_pixel_h

Definition at line 37 of file dp.h.

◆ active_pixel_l

u32 exynos5_dp::active_pixel_l

Definition at line 36 of file dp.h.

◆ active_pixel_sta_h

u32 exynos5_dp::active_pixel_sta_h

Definition at line 55 of file dp.h.

◆ active_pixel_sta_l

u32 exynos5_dp::active_pixel_sta_l

Definition at line 54 of file dp.h.

◆ analog_ctl_1

u32 exynos5_dp::analog_ctl_1

Definition at line 65 of file dp.h.

◆ analog_ctl_2

u32 exynos5_dp::analog_ctl_2

Definition at line 66 of file dp.h.

◆ analog_ctl_3

u32 exynos5_dp::analog_ctl_3

Definition at line 67 of file dp.h.

◆ aux_addr_15_8

u32 exynos5_dp::aux_addr_15_8

Definition at line 142 of file dp.h.

◆ aux_addr_19_16

u32 exynos5_dp::aux_addr_19_16

Definition at line 143 of file dp.h.

◆ aux_addr_7_0

u32 exynos5_dp::aux_addr_7_0

Definition at line 141 of file dp.h.

◆ aux_ch_ctl_1

u32 exynos5_dp::aux_ch_ctl_1

Definition at line 140 of file dp.h.

◆ aux_ch_ctl_2

u32 exynos5_dp::aux_ch_ctl_2

Definition at line 144 of file dp.h.

◆ aux_ch_defer_dtl

u32 exynos5_dp::aux_ch_defer_dtl

Definition at line 137 of file dp.h.

◆ aux_ch_sta

u32 exynos5_dp::aux_ch_sta

Definition at line 135 of file dp.h.

◆ aux_err_num

u32 exynos5_dp::aux_err_num

Definition at line 136 of file dp.h.

◆ aux_hw_retry_ctl

u32 exynos5_dp::aux_hw_retry_ctl

Definition at line 71 of file dp.h.

◆ aux_rx_comm

u32 exynos5_dp::aux_rx_comm

Definition at line 138 of file dp.h.

◆ buf_data_0

u32 exynos5_dp::buf_data_0

Definition at line 146 of file dp.h.

◆ buf_data_ctl

u32 exynos5_dp::buf_data_ctl

Definition at line 139 of file dp.h.

◆ clr_blue_cb

u32 exynos5_dp::clr_blue_cb

Definition at line 21 of file dp.h.

◆ clr_green_y

u32 exynos5_dp::clr_green_y

Definition at line 22 of file dp.h.

◆ clr_red_cr

u32 exynos5_dp::clr_red_cr

Definition at line 23 of file dp.h.

◆ common_int_mask_1

u32 exynos5_dp::common_int_mask_1

Definition at line 80 of file dp.h.

◆ common_int_mask_2

u32 exynos5_dp::common_int_mask_2

Definition at line 81 of file dp.h.

◆ common_int_mask_3

u32 exynos5_dp::common_int_mask_3

Definition at line 82 of file dp.h.

◆ common_int_mask_4

u32 exynos5_dp::common_int_mask_4

Definition at line 83 of file dp.h.

◆ common_int_sta_1

u32 exynos5_dp::common_int_sta_1

Definition at line 74 of file dp.h.

◆ common_int_sta_2

u32 exynos5_dp::common_int_sta_2

Definition at line 75 of file dp.h.

◆ common_int_sta_3

u32 exynos5_dp::common_int_sta_3

Definition at line 76 of file dp.h.

◆ common_int_sta_4

u32 exynos5_dp::common_int_sta_4

Definition at line 77 of file dp.h.

◆ dp_audio_margin

u32 exynos5_dp::dp_audio_margin

Definition at line 127 of file dp.h.

◆ dp_debug_ctl

u32 exynos5_dp::dp_debug_ctl

Definition at line 108 of file dp.h.

Referenced by s5p_dp_get_pll_lock_status().

◆ dp_dn_spread

u32 exynos5_dp::dp_dn_spread

Definition at line 105 of file dp.h.

◆ dp_dn_spread_ctl_1

u32 exynos5_dp::dp_dn_spread_ctl_1

Definition at line 128 of file dp.h.

◆ dp_dn_spread_ctl_2

u32 exynos5_dp::dp_dn_spread_ctl_2

Definition at line 129 of file dp.h.

◆ dp_hdcp_ctl

u32 exynos5_dp::dp_hdcp_ctl

Definition at line 96 of file dp.h.

◆ dp_hpd_deglitch_h

u32 exynos5_dp::dp_hpd_deglitch_h

Definition at line 110 of file dp.h.

◆ dp_hpd_deglitch_l

u32 exynos5_dp::dp_hpd_deglitch_l

Definition at line 109 of file dp.h.

◆ dp_hw_link_training

u32 exynos5_dp::dp_hw_link_training

Definition at line 106 of file dp.h.

◆ dp_int_sta

u32 exynos5_dp::dp_int_sta

Definition at line 79 of file dp.h.

◆ dp_link_debug_ctl

u32 exynos5_dp::dp_link_debug_ctl

Definition at line 112 of file dp.h.

◆ dp_m_cal_ctl

u32 exynos5_dp::dp_m_cal_ctl

Definition at line 131 of file dp.h.

◆ dp_phy_pd

u32 exynos5_dp::dp_phy_pd

Definition at line 122 of file dp.h.

◆ dp_phy_test

u32 exynos5_dp::dp_phy_test

Definition at line 123 of file dp.h.

◆ dp_pll_ctl

u32 exynos5_dp::dp_pll_ctl

Definition at line 121 of file dp.h.

◆ dp_training_ptn_set

u32 exynos5_dp::dp_training_ptn_set

Definition at line 100 of file dp.h.

◆ dp_tx_sw_reset

u32 exynos5_dp::dp_tx_sw_reset

Definition at line 14 of file dp.h.

◆ dp_tx_version

u32 exynos5_dp::dp_tx_version

Definition at line 13 of file dp.h.

◆ dp_vid_ctl

u32 exynos5_dp::dp_vid_ctl

Definition at line 92 of file dp.h.

◆ dp_video_fifo_thrd

u32 exynos5_dp::dp_video_fifo_thrd

Definition at line 125 of file dp.h.

◆ func_en_1

u32 exynos5_dp::func_en_1

Definition at line 15 of file dp.h.

◆ func_en_2

u32 exynos5_dp::func_en_2

Definition at line 16 of file dp.h.

◆ h_b_porch__sta_h

u32 exynos5_dp::h_b_porch__sta_h

Definition at line 61 of file dp.h.

◆ h_b_porch_h

u32 exynos5_dp::h_b_porch_h

Definition at line 43 of file dp.h.

◆ h_b_porch_l

u32 exynos5_dp::h_b_porch_l

Definition at line 42 of file dp.h.

◆ h_b_porch_sta_l

u32 exynos5_dp::h_b_porch_sta_l

Definition at line 60 of file dp.h.

◆ h_f_porch_h

u32 exynos5_dp::h_f_porch_h

Definition at line 39 of file dp.h.

◆ h_f_porch_l

u32 exynos5_dp::h_f_porch_l

Definition at line 38 of file dp.h.

◆ h_f_porch_sta_h

u32 exynos5_dp::h_f_porch_sta_h

Definition at line 57 of file dp.h.

◆ h_f_porch_sta_l

u32 exynos5_dp::h_f_porch_sta_l

Definition at line 56 of file dp.h.

◆ hsync_l

u32 exynos5_dp::hsync_l

Definition at line 40 of file dp.h.

◆ hsync_sta_h

u32 exynos5_dp::hsync_sta_h

Definition at line 59 of file dp.h.

◆ hsync_sta_l

u32 exynos5_dp::hsync_sta_l

Definition at line 58 of file dp.h.

◆ hysnc_h

u32 exynos5_dp::hysnc_h

Definition at line 41 of file dp.h.

◆ int_ctl

u32 exynos5_dp::int_ctl

Definition at line 86 of file dp.h.

◆ int_sta_mask

u32 exynos5_dp::int_sta_mask

Definition at line 85 of file dp.h.

◆ int_state

u32 exynos5_dp::int_state

Definition at line 73 of file dp.h.

◆ lane_count_set

u32 exynos5_dp::lane_count_set

Definition at line 99 of file dp.h.

◆ lane_map

u32 exynos5_dp::lane_map

Definition at line 63 of file dp.h.

◆ link_bw_set

u32 exynos5_dp::link_bw_set

Definition at line 98 of file dp.h.

◆ ln0_link_trn_ctl

u32 exynos5_dp::ln0_link_trn_ctl

Definition at line 101 of file dp.h.

◆ ln1_link_trn_ctl

u32 exynos5_dp::ln1_link_trn_ctl

Definition at line 102 of file dp.h.

◆ ln2_link_trn_ctl

u32 exynos5_dp::ln2_link_trn_ctl

Definition at line 103 of file dp.h.

◆ ln3_link_trn_ctl

u32 exynos5_dp::ln3_link_trn_ctl

Definition at line 104 of file dp.h.

◆ m_aud_gen_filter_th

u32 exynos5_dp::m_aud_gen_filter_th

Definition at line 134 of file dp.h.

◆ m_vid_0

u32 exynos5_dp::m_vid_0

Definition at line 114 of file dp.h.

◆ m_vid_1

u32 exynos5_dp::m_vid_1

Definition at line 115 of file dp.h.

◆ m_vid_2

u32 exynos5_dp::m_vid_2

Definition at line 116 of file dp.h.

◆ m_vid_gen_filter_th

u32 exynos5_dp::m_vid_gen_filter_th

Definition at line 132 of file dp.h.

◆ m_vid_mon

u32 exynos5_dp::m_vid_mon

Definition at line 120 of file dp.h.

◆ n_vid_0

u32 exynos5_dp::n_vid_0

Definition at line 117 of file dp.h.

◆ n_vid_1

u32 exynos5_dp::n_vid_1

Definition at line 118 of file dp.h.

◆ n_vid_2

u32 exynos5_dp::n_vid_2

Definition at line 119 of file dp.h.

◆ pkt_send_ctl

u32 exynos5_dp::pkt_send_ctl

Definition at line 94 of file dp.h.

◆ pll_filter_ctl_1

u32 exynos5_dp::pll_filter_ctl_1

Definition at line 68 of file dp.h.

◆ res1

u8 exynos5_dp::res1[0x10]

Definition at line 12 of file dp.h.

◆ res10

u8 exynos5_dp::res10[0x2c]

Definition at line 93 of file dp.h.

◆ res11

u8 exynos5_dp::res11[0x4]

Definition at line 95 of file dp.h.

◆ res12

u8 exynos5_dp::res12[0x34]

Definition at line 97 of file dp.h.

◆ res13

u8 exynos5_dp::res13[0x1c]

Definition at line 107 of file dp.h.

◆ res14

u8 exynos5_dp::res14[0x14]

Definition at line 111 of file dp.h.

◆ res15

u8 exynos5_dp::res15[0x1c]

Definition at line 113 of file dp.h.

◆ res16

u8 exynos5_dp::res16[0x8]

Definition at line 124 of file dp.h.

◆ res17

u8 exynos5_dp::res17[0x8]

Definition at line 126 of file dp.h.

◆ res18

u8 exynos5_dp::res18[0x18]

Definition at line 130 of file dp.h.

◆ res19

u8 exynos5_dp::res19[0x14]

Definition at line 133 of file dp.h.

◆ res2

u8 exynos5_dp::res2[0x4]

Definition at line 25 of file dp.h.

◆ res20

u8 exynos5_dp::res20[0x18]

Definition at line 145 of file dp.h.

◆ res21

u8 exynos5_dp::res21[0x3c]

Definition at line 147 of file dp.h.

◆ res3

u8 exynos5_dp::res3[0x288]

Definition at line 62 of file dp.h.

◆ res4

u8 exynos5_dp::res4[0x10]

Definition at line 64 of file dp.h.

◆ res5

u8 exynos5_dp::res5[0xc]

Definition at line 70 of file dp.h.

◆ res6

u8 exynos5_dp::res6[0x2c]

Definition at line 72 of file dp.h.

◆ res7

u8 exynos5_dp::res7[0x8]

Definition at line 78 of file dp.h.

◆ res8

u8 exynos5_dp::res8[0x08]

Definition at line 84 of file dp.h.

◆ res9

u8 exynos5_dp::res9[0x200]

Definition at line 87 of file dp.h.

◆ soc_general_ctl

u32 exynos5_dp::soc_general_ctl

Definition at line 148 of file dp.h.

◆ sys_ctl_1

u32 exynos5_dp::sys_ctl_1

Definition at line 88 of file dp.h.

◆ sys_ctl_2

u32 exynos5_dp::sys_ctl_2

Definition at line 89 of file dp.h.

◆ sys_ctl_3

u32 exynos5_dp::sys_ctl_3

Definition at line 90 of file dp.h.

◆ sys_ctl_4

u32 exynos5_dp::sys_ctl_4

Definition at line 91 of file dp.h.

◆ total_line_h

u32 exynos5_dp::total_line_h

Definition at line 28 of file dp.h.

◆ total_line_l

u32 exynos5_dp::total_line_l

Definition at line 27 of file dp.h.

◆ total_line_sta_h

u32 exynos5_dp::total_line_sta_h

Definition at line 46 of file dp.h.

◆ total_line_sta_l

u32 exynos5_dp::total_line_sta_l

Definition at line 45 of file dp.h.

◆ total_pixel_h

u32 exynos5_dp::total_pixel_h

Definition at line 35 of file dp.h.

◆ total_pixel_l

u32 exynos5_dp::total_pixel_l

Definition at line 34 of file dp.h.

◆ total_pixel_sta_h

u32 exynos5_dp::total_pixel_sta_h

Definition at line 53 of file dp.h.

◆ total_pixel_sta_l

u32 exynos5_dp::total_pixel_sta_l

Definition at line 52 of file dp.h.

◆ tx_amp_tuning_ctl

u32 exynos5_dp::tx_amp_tuning_ctl

Definition at line 69 of file dp.h.

◆ v_b_porch

u32 exynos5_dp::v_b_porch

Definition at line 33 of file dp.h.

◆ v_b_porch_sta

u32 exynos5_dp::v_b_porch_sta

Definition at line 51 of file dp.h.

◆ v_f_porch

u32 exynos5_dp::v_f_porch

Definition at line 31 of file dp.h.

◆ v_f_porch_sta

u32 exynos5_dp::v_f_porch_sta

Definition at line 49 of file dp.h.

◆ vid_status

u32 exynos5_dp::vid_status

Definition at line 44 of file dp.h.

◆ video_ctl_1

u32 exynos5_dp::video_ctl_1

Definition at line 17 of file dp.h.

◆ video_ctl_10

u32 exynos5_dp::video_ctl_10

Definition at line 26 of file dp.h.

◆ video_ctl_2

u32 exynos5_dp::video_ctl_2

Definition at line 18 of file dp.h.

◆ video_ctl_3

u32 exynos5_dp::video_ctl_3

Definition at line 19 of file dp.h.

◆ video_ctl_4

u32 exynos5_dp::video_ctl_4

Definition at line 20 of file dp.h.

◆ video_ctl_8

u32 exynos5_dp::video_ctl_8

Definition at line 24 of file dp.h.

◆ vsync

u32 exynos5_dp::vsync

Definition at line 32 of file dp.h.

◆ vsync_sta

u32 exynos5_dp::vsync_sta

Definition at line 50 of file dp.h.

The documentation for this struct was generated from the following file:

src/soc/samsung/exynos5250/include/soc/dp.h

Data Fields